公开(公告)号：US10833022B2

公开(公告)日：2020-11-10

申请号：US16654354

申请日：2019-10-16

Applicant: GLOBALFOUNDRIES INC.

Inventor： Cung D. Tran ,  Huaxiang Li ,  Bradley Morgenfeld ,  Xintuo Dai ,  Sanggil Bae ,  Rui Chen ,  Md Motasim Bellah ,  Dongyue Yang ,  Minghao Tang ,  Christian J. Ayala ,  Ravi Prakash Srivastava ,  Kripa Nidhan Chauhan ,  Pavan Kumar Chinthamanipeta Sripadarao

IPC: G03F9/00 ,  G03F7/16 ,  G03F7/20 ,  H01L23/544 ,  H01L21/027 ,  H01L23/528 ,  H01L23/538

Abstract: In an exemplary method, a first layer is formed on a substrate. First overlay marks are formed in a first zone of the first layer. A non-transparent layer is formed on top of the first layer. At least a portion of the non-transparent layer is removed from an area above the first zone of the first layer. This provides optical access to the first overlay marks. A second layer is formed on top of the non-transparent layer. Second overlay marks are formed in a second zone of the second layer. Position information is obtained from each of the first overlay marks and the second overlay marks.

公开(公告)号：US20200051923A1

公开(公告)日：2020-02-13

申请号：US16654354

申请日：2019-10-16

Applicant: GLOBALFOUNDRIES INC.

Inventor： Cung D. Tran ,  Huaxiang Li ,  Bradley Morgenfeld ,  Xintuo Dai ,  Sanggil Bae ,  Rui Chen ,  Md Motasim Bellah ,  Dongyue Yang ,  Minghao Tang ,  Christian J. Ayala ,  Ravi Prakash Srivastava ,  Kripa Nidhan Chauhan ,  Pavan Kumar Chinthamanipeta Sripadarao

IPC: H01L23/544 ,  G03F9/00 ,  H01L21/027 ,  G03F7/16

Abstract: In an exemplary method, a first layer is formed on a substrate. First overlay marks are formed in a first zone of the first layer. A non-transparent layer is formed on top of the first layer. At least a portion of the non-transparent layer is removed from an area above the first zone of the first layer. This provides optical access to the first overlay marks. A second layer is formed on top of the non-transparent layer. Second overlay marks are formed in a second zone of the second layer. Position information is obtained from each of the first overlay marks and the second overlay marks.

公开(公告)号：US10395926B1

公开(公告)日：2019-08-27

申请号：US15954736

申请日：2018-04-17

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Minghao Tang ,  Yuping Ren ,  Sean Xuan Lin ,  Shao Beng Law ,  Genevieve Beique ,  Xun Xiang ,  Rui Chen

IPC: H01L21/033 ,  H01L21/311 ,  H01L21/768

Abstract: Methods of self-aligned multiple patterning. A mandrel line is formed over a hardmask layer, and forming a block mask is formed over a first portion of the mandrel line that is linearly arranged between respective second portions of the mandrel line. After forming the first block mask, the second portions of the mandrel line are removed with an etching process to cut the mandrel line and expose respective portions of the hardmask layer. A second portion of the mandrel line is covered by the block mask during the etching process to define a mandrel cut in the mandrel line.

公开(公告)号：US20190181040A1

公开(公告)日：2019-06-13

申请号：US15834151

申请日：2017-12-07

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Minghao Tang ,  Rui Chen ,  Yuping Ren

IPC: H01L21/768 ,  H01L21/033

Abstract: Methods of fabricating an interconnect structure. A first sacrificial layer is deposited over a dielectric layer, and a block mask is formed that covers an area on the first sacrificial layer. A second sacrificial layer is deposited over the block mask and the first sacrificial layer. After the block mask is formed, the second sacrificial layer is patterned to form a mandrel that is arranged in part on a portion of the block mask.

公开(公告)号：US20190363053A1

公开(公告)日：2019-11-28

申请号：US15985838

申请日：2018-05-22

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Wei Zhao ,  Minghao Tang ,  Rui Chen ,  Dongyue Yang ,  Haiting Wang ,  Erik Geiss ,  Scott Beasor

IPC: H01L23/544

Abstract: One illustrative example of an overlay mark disclosed herein includes four quadrants (I-IV). Each quadrant of the mark contains an inner periodic structure and an outer periodic structure. Each of the outer periodic structures includes a plurality of outer features. Each of the inner periodic structures includes a plurality of first inner groups, each of the first inner groups having a plurality of first inner features, each first inner group being oriented such that there is an end-to-end spacing relationship between each first inner group and a selected one of the outer features.

公开(公告)号：US20190221661A1

公开(公告)日：2019-07-18

申请号：US15869541

申请日：2018-01-12

Applicant: GLOBALFOUNDRIES INC.

Inventor： Wei Zhao ,  Ming Hao Tang ,  Haiting Wang ,  Rui Chen ,  Yuping Ren ,  Hui Zang ,  Scott H. Beasor ,  Ruilong Xie

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/49 ,  H01L21/265 ,  H01L27/11 ,  H01L21/762 ,  H01L21/3105 ,  H01L21/28 ,  H01L29/423

Abstract: A method of forming isolation pillars for a gate structure, the method including: providing a preliminary structure including a substrate having a plurality of fins thereon, an STI formed between adjacent fins, an upper surface of the STIs extending higher than an upper surface of the fins, and a hardmask over the upper surface of the fins and between adjacent STIs; forming a first trench in a first selected STI and between adjacent fins in a gate region, and forming a second trench in a second selected STI and between adjacent fins in a TS region; and filling the first and second trenches with an isolation fill thereby forming a first isolation pillar in the gate region and a second isolation pillar in the TS region, the first and second isolation pillars extending below the upper surface of the STIs.

公开(公告)号：US10319626B1

公开(公告)日：2019-06-11

申请号：US15834151

申请日：2017-12-07

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Minghao Tang ,  Rui Chen ,  Yuping Ren

IPC: H01L21/033 ,  H01L21/768

Abstract: Methods of fabricating an interconnect structure. A first sacrificial layer is deposited over a dielectric layer, and a block mask is formed that covers an area on the first sacrificial layer. A second sacrificial layer is deposited over the block mask and the first sacrificial layer. After the block mask is formed, the second sacrificial layer is patterned to form a mandrel that is arranged in part on a portion of the block mask.

公开(公告)号：US10600914B2

公开(公告)日：2020-03-24

申请号：US15869541

申请日：2018-01-12

Applicant: GLOBALFOUNDRIES INC.

Inventor： Wei Zhao ,  Ming Hao Tang ,  Haiting Wang ,  Rui Chen ,  Yuping Ren ,  Hui Zang ,  Scott H. Beasor ,  Ruilong Xie

IPC: H01L29/78 ,  H01L21/762 ,  H01L21/265 ,  H01L21/28 ,  H01L21/3105 ,  H01L27/11 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66

Abstract: A method of forming isolation pillars for a gate structure, the method including: providing a preliminary structure including a substrate having a plurality of fins thereon, an STI formed between adjacent fins, an upper surface of the STIs extending higher than an upper surface of the fins, and a hardmask over the upper surface of the fins and between adjacent STIs; forming a first trench in a first selected STI and between adjacent fins in a gate region, and forming a second trench in a second selected STI and between adjacent fins in a TS region; and filling the first and second trenches with an isolation fill thereby forming a first isolation pillar in the gate region and a second isolation pillar in the TS region, the first and second isolation pillars extending below the upper surface of the STIs.

公开(公告)号：US20190259708A1

公开(公告)日：2019-08-22

申请号：US15898606

申请日：2018-02-18

Applicant: GLOBALFOUNDRIES INC.

Inventor： Ming Hao Tang ,  Yuping Ren ,  Rui Chen ,  Bradley Morgenfeld ,  Zheng G. Chen

IPC: H01L23/544 ,  G03F9/00 ,  G03F7/20 ,  H01L21/66 ,  G01N21/95

Abstract: This disclosure relates to a structure for aligning layers of an integrated circuit (IC) structure that may include a first dielectric layer positioned above a semiconductor substrate having one or more active devices, a trench stop layer positioned above the first dielectric layer, a second dielectric layer positioned above the trench stop layer, and a plurality of metal-filled marking trenches extending vertically through the second dielectric layer and the trench stop layer and at least partially into the first dielectric layer. The metal-filled trenches are electrically isolated from any active devices contained in the IC.

公开(公告)号：US10707175B2

公开(公告)日：2020-07-07

申请号：US15985838

申请日：2018-05-22

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Wei Zhao ,  Minghao Tang ,  Rui Chen ,  Dongyue Yang ,  Haiting Wang ,  Erik Geiss ,  Scott Beasor

IPC: H01L23/544

Abstract: One illustrative example of an overlay mark disclosed herein includes four quadrants (I-IV). Each quadrant of the mark contains an inner periodic structure and an outer periodic structure. Each of the outer periodic structures includes a plurality of outer features. Each of the inner periodic structures includes a plurality of first inner groups, each of the first inner groups having a plurality of first inner features, each first inner group being oriented such that there is an end-to-end spacing relationship between each first inner group and a selected one of the outer features.