公开(公告)号：US20210091214A1

公开(公告)日：2021-03-25

申请号：US16909376

申请日：2020-06-23

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Herbert HO ,  Vibhor JAIN ,  John J. PEKARIK ,  Claude ORTOLLAND ,  Judson R. HOLT ,  Qizhi LIU ,  Viorel ONTALUS

IPC: H01L29/737 ,  H01L29/08 ,  H01L29/66

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a device with a marker layer and methods of manufacture. The device includes: a collector region; an intrinsic base region above the collector region; an emitter region comprising emitter material and a marker layer vertically between the intrinsic base region and the emitter material; and an extrinsic base region in electrical contact with the intrinsic base region.

公开(公告)号：US20240186441A1

公开(公告)日：2024-06-06

申请号：US18075908

申请日：2022-12-06

Applicant: GlobalFoundries U.S. Inc.

Inventor： Alexander M. DERRICKSON ,  Uppili S. RAGHUNATHAN ,  Vibhor JAIN ,  Yusheng BIAN ,  Judson R. HOLT

IPC: H01L31/11 ,  H01L31/0232 ,  H01L31/028 ,  H01L31/18

CPC classification number: H01L31/1105 ,  H01L31/02327 ,  H01L31/028 ,  H01L31/1808

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to lateral phototransistors and methods of manufacture. The structure includes a lateral bipolar transistor; and a T-shaped photosensitive structure vertically above an intrinsic base of the lateral bipolar transistor.

公开(公告)号：US20240339527A1

公开(公告)日：2024-10-10

申请号：US18296521

申请日：2023-04-06

Applicant: GlobalFoundries U.S. Inc.

Inventor： Judson R. HOLT ,  John J. PEKARIK ,  Anindya NATH ,  Souvick MITRA

IPC: H01L29/737 ,  H01L21/322

CPC classification number: H01L29/7371 ,  H01L21/322 ,  H01L29/747 ,  H01L29/78

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to low capacitance, low resistance devices and methods of manufacture. The structure includes: a semiconductor substrate; a device having an active region; and a porous semiconductor material within the semiconductor substrate and surrounding the active region of the device.

公开(公告)号：US20250031401A1

公开(公告)日：2025-01-23

申请号：US18354405

申请日：2023-07-18

Applicant: GlobalFoundries U.S. Inc.

Inventor： Bartlomiej J. PAWLAK ,  Judson R. HOLT

IPC: H01L29/775 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to nanosheet transistor structures and methods of manufacture. The structure includes: a plurality of stacked semiconductor nanosheets over a semiconductor substrate; a plurality of gate structures surrounding individual nanosheets of the plurality of semiconductor nanosheets; an inner sidewall spacer adjacent each of the plurality of gate structures; and corner spacers under the plurality of stacked semiconductor nanosheets.

公开(公告)号：US20210091195A1

公开(公告)日：2021-03-25

申请号：US16732755

申请日：2020-01-02

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Judson R. HOLT ,  Vibhor JAIN ,  Qizhi LIU ,  Ramsey HAZBUN ,  Pernell DONGMO ,  John J. PEKARIK ,  Cameron E. LUCE

IPC: H01L29/423 ,  H01L29/66 ,  H01L29/737 ,  H01L29/08

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to heterojunction bipolar transistors and methods of manufacture. The structure includes: a sub-collector region in a substrate; a collector region above the sub-collector region, the collector region composed of semiconductor material; an intrinsic base region composed of intrinsic base material surrounded by the semiconductor material above the collector region; and an emitter region above the intrinsic base region.

公开(公告)号：US20240162345A1

公开(公告)日：2024-05-16

申请号：US17984736

申请日：2022-11-10

Applicant: GlobalFoundries U.S. Inc.

Inventor： Shesh M. PANDEY ,  Rajendran KRISHNASAMY ,  Judson R. HOLT ,  Chung Foong TAN

IPC: H01L29/78 ,  H01L21/762 ,  H01L29/40 ,  H01L29/66

CPC classification number: H01L29/7823 ,  H01L21/76224 ,  H01L29/401 ,  H01L29/407 ,  H01L29/66681

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a transistor with a metal field plate contact and methods of manufacture. The structure includes: a gate structure on a semiconductor substrate; a shallow trench isolation structure within the semiconductor substrate; and a contact extending from the gate structure and into the shallow trench isolation structure.

公开(公告)号：US20230369474A1

公开(公告)日：2023-11-16

申请号：US17745280

申请日：2022-05-16

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Judson R. HOLT ,  Shesh Mani PANDEY ,  Vibhor JAIN

IPC: H01L29/737 ,  H01L29/66

CPC classification number: H01L29/7371 ,  H01L29/66242

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to heterojunction bipolar transistors and methods of manufacture. The structure includes: a collector in a semiconductor substrate; a subcollector in the semiconductor substrate; an intrinsic base over the subcollector; an extrinsic base adjacent to the intrinsic base; an emitter over the intrinsic base; and an isolation structure between the extrinsic base and the emitter and which overlaps the subcollector.

公开(公告)号：US20230369473A1

公开(公告)日：2023-11-16

申请号：US17740725

申请日：2022-05-10

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Shesh Mani PANDEY ,  Vibhor JAIN ,  Judson R. HOLT

IPC: H01L29/737 ,  H01L29/66 ,  H01L29/10

CPC classification number: H01L29/7371 ,  H01L29/66242 ,  H01L29/1004

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to heterojunction bipolar transistors and methods of manufacture. The structure includes: a subcollector under a buried insulator layer; a collector above the subcollector; a base within the buried insulator layer; an emitter above the base; and contacts to the subcollector, the base and the emitter.

公开(公告)号：US20230231041A1

公开(公告)日：2023-07-20

申请号：US17580127

申请日：2022-01-20

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Shesh Mani PANDEY ,  Alexander M. DERRICKSON ,  Judson R. HOLT ,  Vibhor JAIN

IPC: H01L29/737 ,  H01L29/66 ,  H01L29/08 ,  H01L29/423 ,  H01L29/10 ,  H01L29/417

CPC classification number: H01L29/7371 ,  H01L29/66234 ,  H01L29/0821 ,  H01L29/42304 ,  H01L29/1004 ,  H01L29/41708

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to vertical bipolar transistors and methods of manufacture. The structure includes: an intrinsic base region comprising semiconductor-on-insulator material; a collector region confined within an insulator layer beneath the semiconductor-on-insulator material; an emitter region above the intrinsic base region; and an extrinsic base region above the intrinsic base region.