Camera calibration with lens distortion from low-rank textures
    2.
    发明授权
    Camera calibration with lens distortion from low-rank textures 有权
    相机校准与低等级纹理的镜头失真

    公开(公告)号:US08818132B2

    公开(公告)日:2014-08-26

    申请号:US13310729

    申请日:2011-12-03

    IPC分类号: G06K9/36 G06T7/00

    摘要: A “Camera Calibrator” provides various techniques for recovering intrinsic camera parameters and distortion characteristics by processing a set of one or more input images. These techniques are based on extracting “Transform Invariant Low-Rank Textures” (TILT) from input images using high-dimensional convex optimization tools for matrix rank minimization and sparse signal recovery. The Camera Calibrator provides a simple, accurate, and flexible method to calibrate intrinsic parameters of a camera even with significant lens distortion, noise, errors, partial occlusions, illumination and viewpoint change, etc. Distortions caused by the camera can then be automatically corrected or removed from images. Calibration is achieved under a wide range of practical scenarios, including using multiple images of a known pattern, multiple images of an unknown pattern, single or multiple images of multiple patterns, etc. Significantly, calibration is achieved without extracting or manually identifying low-level features such as corners or edges from the calibration images.

    摘要翻译: “相机校准器”提供了通过处理一组一个或多个输入图像来恢复本征相机参数和失真特性的各种技术。 这些技术基于使用用于矩阵秩最小化和稀疏信号恢复的高维凸优化工具从输入图像中提取“变换不变低阶纹理”(TILT)。 相机校准器提供了一种简单,准确和灵活的校准相机内在参数的方法,即使有明显的镜头失真,噪点,错误,部分遮挡,照明和视点更改等。然后可以自动更正相机造成的失真或 从图像中删除 在广泛的实际情况下实现校准,包括使用已知图案的多个图像,未知图案的多个图像,多个图案的单个或多个图像等。显着地,在不提取或手动识别低级别的情况下实现校准 特征如校准图像的拐角或边缘。

    Atomic layer deposition processes for non-volatile memory devices
    5.
    发明授权
    Atomic layer deposition processes for non-volatile memory devices 失效
    用于非易失性存储器件的原子层沉积工艺

    公开(公告)号:US07659158B2

    公开(公告)日:2010-02-09

    申请号:US12059782

    申请日:2008-03-31

    IPC分类号: H01L21/8238 H01L29/788

    摘要: Embodiments of the invention provide memory devices and methods for forming memory devices. In one embodiment, a memory device is provided which includes a floating gate polysilicon layer disposed over source/drain regions of a substrate, a silicon oxynitride layer disposed over the floating gate polysilicon layer, a first aluminum oxide layer disposed over the silicon oxynitride layer, a hafnium silicon oxynitride layer disposed over the first aluminum oxide layer, a second aluminum oxide layer disposed over the hafnium silicon oxynitride layer, and a control gate polysilicon layer disposed over the second aluminum oxide layer. In another embodiment, a memory device is provided which includes a control gate polysilicon layer disposed over an inter-poly dielectric stack disposed over a silicon oxide layer disposed over the floating gate polysilicon layer. The inter-poly dielectric stack contains two silicon oxynitride layers separated by a silicon nitride layer.

    摘要翻译: 本发明的实施例提供了用于形成存储器件的存储器件和方法。 在一个实施例中,提供了一种存储器件,其包括设置在衬底的源极/漏极区域上的浮置栅极多晶硅层,设置在浮置栅极多晶硅层上的氧氮化硅层,设置在氧氮化硅层上的第一氧化铝层, 设置在所述第一氧化铝层上的铪硅氮化物层,设置在所述铪硅氮氧化物层上的第二氧化铝层,以及设置在所述第二氧化铝层上的控制栅极多晶硅层。 在另一个实施例中,提供了一种存储器件,其包括设置在布置在浮置多晶硅层上方的氧化硅层上的多晶硅介质叠层之间的控制栅极多晶硅层。 多晶硅间介质堆叠包含由氮化硅层分隔的两个氮氧化硅层。

    Hetero-structure variable silicon rich nitride for multiple level memory flash memory device
    6.
    发明授权
    Hetero-structure variable silicon rich nitride for multiple level memory flash memory device 失效
    异质结构可变富硅氮化物用于多级存储器闪存器件

    公开(公告)号:US07602067B2

    公开(公告)日:2009-10-13

    申请号:US11957787

    申请日:2007-12-17

    申请人: Yi Ma Robert Ogle

    发明人: Yi Ma Robert Ogle

    IPC分类号: H01L29/40

    摘要: Charge storage stacks containing hetero-structure variable silicon richness nitride for memory cells and methods for making the charge storage stacks are provided. The charge storage stack can contain a first insulating layer on a semiconductor substrate; n charge storage layers comprising silicon-rich silicon nitride on the first insulating layer, wherein numbers of the charge storage layers increase from the bottom to the top and a k-value of an n−1th charge storage layer is higher than a k-value of an nth charge storage layer; n−1 dielectric layers comprising substantially stoichiometric silicon nitride between each of the n charge storage layers; and a second insulating layer on the nth charge storage layers.

    摘要翻译: 提供了包含用于存储单元的异质结构可变富硅氮化物的电荷存储堆,以及用于制造电荷存储堆的方法。 电荷存储堆可以包含半导体衬底上的第一绝缘层; n在第一绝缘层上形成包括富硅氮化物的存储层,其中电荷存储层的数量从底部增加到顶部,并且第n-1个电荷存储层的k值高于k值 的第n电荷存储层; n-1个电介质层,其在n个电荷存储层中的每一个之间包含基本上化学计量的氮化硅; 以及第n电荷存储层上的第二绝缘层。

    MODULATING THE STRESS OF POLY-CRYSTALINE SILICON FILMS AND SURROUNDING LAYERS THROUGH THE USE OF DOPANTS AND MULTI-LAYER SILICON FILMS WITH CONTROLLED CRYSTAL STRUCTURE
    7.
    发明申请
    MODULATING THE STRESS OF POLY-CRYSTALINE SILICON FILMS AND SURROUNDING LAYERS THROUGH THE USE OF DOPANTS AND MULTI-LAYER SILICON FILMS WITH CONTROLLED CRYSTAL STRUCTURE 审中-公开
    通过使用多晶硅和多层硅膜控制晶体结构来调节聚晶硅薄膜和周边层的应力

    公开(公告)号:US20090065816A1

    公开(公告)日:2009-03-12

    申请号:US12206390

    申请日:2008-09-08

    IPC分类号: H01L21/20 H01L29/04 H01L29/78

    摘要: In certain embodiments a method of forming a multi-layer silicon film is provided. A substrate is placed in a process chamber. An amorphous silicon film is formed on the substrate by flowing into the process chamber a first process gas comprising a silicon source gas. A polysilicon film is formed on the amorphous silicon film by flowing into the deposition chamber a first process gas mix comprising a silicon source gas and a first dilution gas mix comprising H2 and an inert gas at a first temperature. In certain embodiments, the polysilicon film has a crystal orientation which is dominated by the direction. In certain embodiments, the polysilicon film has a crystal orientation dominated by the orientation. Structures comprising a lower amorphous silicon film and an upper polysilicon film having a random grain structure or a columnar grain structure are provided as well.

    摘要翻译: 在某些实施方案中,提供了形成多层硅膜的方法。 将基板放置在处理室中。 通过在处理室中流入包括硅源气体的第一工艺气体,在衬底上形成非晶硅膜。 通过在第一温度下流入沉积室中,形成包含硅源气体和包含H 2和惰性气体的第一稀释气体混合物的第一工艺气体混合物,在非晶硅膜上形成多晶硅膜。 在某些实施例中,多晶硅膜具有由<220>方向支配的晶体取向。 在某些实施方案中,多晶硅膜具有以<111>取向为主的晶体取向。 还提供了包括下部非晶硅膜和具有随机晶粒结构或柱状晶粒结构的上部多晶硅膜的结构。

    Silicon-rich low thermal budget silicon nitride for integrated circuits
    9.
    发明授权
    Silicon-rich low thermal budget silicon nitride for integrated circuits 有权
    富含硅的低热预算氮化硅用于集成电路

    公开(公告)号:US06940151B2

    公开(公告)日:2005-09-06

    申请号:US10261463

    申请日:2002-09-30

    摘要: A low-thermal budget, silicon-rich silicon nitride film may include a concentration of hydrogen in Si—H bonds being at least 1.5 times as great as a concentration of hydrogen in N—H bonds. The silicon nitride film suppresses boron diffusion in boron-doped devices when such devices are processed using high-temperature processing operations that conventionally urge boron diffusion. The low-thermal budget, silicon-rich silicon nitride film may be used to form spacers in CMOS devices, it may be used as part of a dielectric stack to prevent shorting in tightly packed SRAM arrays, and it may be used in BiCMOS processing to form a base nitride layer and/or nitride spacers isolating the base from the emitter. Furthermore the low-thermal budget, silicon-rich silicon nitride film may remain covering the CMOS structure while bipolar devices are being formed, as it suppresses the boron diffusion that results in boron penetration and boron-doped poly depletion.

    摘要翻译: 低热预算,富含硅的氮化硅膜可能包括Si-H键中的氢浓度至少为N-H键中氢的浓度的1.5倍。 当使用通常促进硼扩散的高温处理操作来处理这种器件时,氮化硅膜抑制硼掺杂器件中的硼扩散。 低热量预算,富含硅的氮化硅膜可用于在CMOS器件中形成间隔物,其可用作电介质堆叠的一部分,以防止紧密堆积的SRAM阵列中的短路,并且可用于BiCMOS处理 形成将基极与发射极隔离的基底氮化物层和/或氮化物间隔物。 此外,低热量预算,富硅的氮化硅膜可能保持覆盖CMOS结构,同时双极器件正在形成,因为它抑制了硼扩散,导致硼渗透和硼掺杂的多晶硅耗尽。