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    Thin film transistor substrate, display device having the same and method of manufacturing the display device
    2.
    发明授权
    Thin film transistor substrate, display device having the same and method of manufacturing the display device 有权
    薄膜晶体管基板，具有相同的显示装置和制造显示装置的方法

    公开(公告)号：US08035100B2

    公开(公告)日：2011-10-11

    申请号：US12197573

    申请日：2008-08-25

    申请人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Byoung-June Kim ,  Czang-Ho Lee ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

    发明人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Byoung-June Kim ,  Czang-Ho Lee ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

    IPC分类号： H01L29/12

    CPC分类号： H01L29/7869 ,  H01L27/1225

    摘要： A thin film transistor substrate includes an insulating plate; a gate electrode disposed on the insulating plate; a semiconductor layer comprising a metal oxide, wherein the metal oxide has oxygen defects of less than or equal to 3%, and wherein the metal oxide comprises about 0.01 mole/cm3 to about 0.3 mole/cm3 of a 3d transition metal; a gate insulating layer disposed between the gate electrode and the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer. Also described is a display substrate. The metal oxide has oxygen defects of less than or equal to 3%, and is doped with about 0.01 mole/cm3 to about 0.3 mole/cm3 of 3d transition metal. The metal oxide comprises indium oxide or titanium oxide. The 3d transition metal includes at least one 3d transition metal selected from the group consisting of chromium, cobalt, nickel, iron, manganese, and mixtures thereof.

    摘要翻译： 薄膜晶体管基板包括绝缘板; 设置在绝缘板上的栅电极; 包含金属氧化物的半导体层，其中所述金属氧化物具有小于或等于3％的氧缺陷，并且其中所述金属氧化物包含约0.01mol / cm 3至约0.3mol / cm 3的3d过渡金属; 设置在所述栅极电极和所述半导体层之间的栅极绝缘层; 以及设置在半导体层上的源电极和漏电极。 还描述了显示基板。 金属氧化物具有小于或等于3％的氧缺陷，并且掺杂有约0.01摩尔/ cm3至约0.3摩尔/ cm3的3d过渡金属。 金属氧化物包括氧化铟或二氧化钛。 3d过渡金属包括选自铬，钴，镍，铁，锰及其混合物中的至少一种3d过渡金属。

    Semiconductor memory device with late write function and data input/output method therefor
    5.
    发明申请
    Semiconductor memory device with late write function and data input/output method therefor 失效
    具有后期写入功能的半导体存储器件及其数据输入/输出方法

    公开(公告)号：US20050135160A1

    公开(公告)日：2005-06-23

    申请号：US11005544

    申请日：2004-12-06

    申请人： Sung-Ryul Kim ,  Dae-Hee Jung

    发明人： Sung-Ryul Kim ,  Dae-Hee Jung

    IPC分类号： G11C7/10 ,  G11C11/413 ,  G11C7/02

    CPC分类号： G11C7/1087 ,  G11C7/1006 ,  G11C7/1012 ,  G11C7/1051 ,  G11C7/1078 ,  G11C11/413 ,  G11C2207/107 ,  G11C2207/2218

    摘要： An integrated circuit memory device includes a memory cell array, a plurality of data input lines configured to convey data to the memory cell array and a plurality of data output lines configured to convey data from the memory cell array. The device also includes a memory write buffer that receives write data for the memory cell array and responsively drives the data input lines, a sense amplifier and a plurality of sense amplifier input lines configured to convey data to the sense amplifier. The device further includes a selecting circuit coupled to the data input lines, to the data output lines and to the sense amplifier input lines and configured to selectively couple the data input lines to the sense amplifier input lines responsive to a control signal.

    摘要翻译： 集成电路存储器件包括存储单元阵列，被配置为将数据传送到存储单元阵列的多条数据输入线以及被配置为从存储单元阵列传送数据的多条数据输出线。 该装置还包括存储器写入缓冲器，其接收存储单元阵列的写入数据并且响应地驱动数据输入线，读出放大器和多个读出放大器输入线，其被配置为将数据传送到读出放大器。 该装置还包括耦合到数据输入线，数据输出线和读出放大器输入线的选择电路，并且被配置成响应于控制信号将数据输入线选择性地耦合到读出放大器输入线。

    Display substrate having quantum well for improved electron mobility and display device including the same
    7.
    发明授权
    Display substrate having quantum well for improved electron mobility and display device including the same 有权
    具有用于改善电子迁移率的量子阱的显示基板和包括该电子迁移率的显示装置

    公开(公告)号：US08319905B2

    公开(公告)日：2012-11-27

    申请号：US12353152

    申请日：2009-01-13

    申请人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

    发明人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

    IPC分类号： G02F1/1368 ,  H01L29/10

    CPC分类号： G02F1/1368 ,  G02F2202/108 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/7869

    摘要： Provided are a display substrate and a display device including the same. The display substrate includes: gate wiring; a first semiconductor pattern formed on the gate wiring and having a first energy bandgap; a second semiconductor pattern formed on the first semiconductor pattern and having a second energy bandgap which is greater than the first energy bandgap; data wiring formed on the first semiconductor pattern; and a pixel electrode electrically connected to the data wiring. Because the second energy bandgap is larger than the first energy bandgap, a quantum well is formed in the first semiconductor pattern, enhancing electron mobility therein.

    摘要翻译： 提供了一种显示基板和包括该基板的显示装置。 显示基板包括：栅极布线; 形成在所述栅极布线上并具有第一能量带隙的第一半导体图案; 形成在所述第一半导体图案上并具有大于所述第一能带隙的第二能带隙的第二半导体图案; 形成在第一半导体图案上的数据布线; 以及与数据配线电连接的像素电极。 由于第二能量带隙大于第一能带隙，所以在第一半导体图案中形成量子阱，增强其中的电子迁移率。

    Thin film transistor array panel
    8.
    发明授权
    Thin film transistor array panel 有权
    薄膜晶体管阵列面板

    公开(公告)号：US08183570B2

    公开(公告)日：2012-05-22

    申请号：US12946953

    申请日：2010-11-16

    申请人： Dong-Gyu Kim ,  Sung-Haeng Cho ,  Hyung-Jun Kim ,  Sung-Ryul Kim ,  Yong-Mo Choi

    发明人： Dong-Gyu Kim ,  Sung-Haeng Cho ,  Hyung-Jun Kim ,  Sung-Ryul Kim ,  Yong-Mo Choi

    IPC分类号： H01L29/04

    CPC分类号： G02F1/136213 ,  H01L27/1255

    摘要： A thin film transistor array panel, in which a middle storage electrode and a storage electrode overlapping a drain electrode of a thin film transistor thereby forming a storage capacitance are formed. Accordingly, sufficient storage capacitance may be formed without a decrease of the aperture ratio and light transmittance of a liquid crystal display. Also, the capacitance may be sufficiently formed through the connecting member connected to a gate metal layer.

    摘要翻译： 一种薄膜晶体管阵列面板，其中形成中间存储电极和与薄膜晶体管的漏极重叠从而形成存储电容的存储电极。 因此，可以形成足够的存储电容，而不会降低液晶显示器的开口率和透光率。 此外，可以通过连接到栅极金属层的连接构件充分形成电容。

    THIN FILM TRANSISTOR ARRAY PANEL
    10.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL 有权
    薄膜晶体管阵列

    公开(公告)号：US20110057194A1

    公开(公告)日：2011-03-10

    申请号：US12946953

    申请日：2010-11-16

    申请人： DONG-GYU KIM ,  Sung-Haeng Cho ,  Hyung-Jun Kim ,  Sung-Ryul Kim ,  Yong-Mo Choi

    发明人： DONG-GYU KIM ,  Sung-Haeng Cho ,  Hyung-Jun Kim ,  Sung-Ryul Kim ,  Yong-Mo Choi

    IPC分类号： H01L33/16

    CPC分类号： G02F1/136213 ,  H01L27/1255

    摘要： A thin film transistor array panel, in which a middle storage electrode and a storage electrode overlapping a drain electrode of a thin film transistor thereby forming a storage capacitance are formed. Accordingly, sufficient storage capacitance may be formed without a decrease of the aperture ratio and light transmittance of a liquid crystal display. Also, the capacitance may be sufficiently formed through the connecting member connected to a gate metal layer.

    摘要翻译： 一种薄膜晶体管阵列面板，其中形成中间存储电极和与薄膜晶体管的漏极重叠从而形成存储电容的存储电极。 因此，可以形成足够的存储电容，而不会降低液晶显示器的开口率和透光率。 此外，可以通过连接到栅极金属层的连接构件充分形成电容。