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公开(公告)号：US09934085B2
公开(公告)日：2018-04-03
申请号：US14785071
申请日：2013-05-29
Applicant: Hewlett-Packard Development Company, L.P.
Inventor： Doe-Hyun Yoon , Jichuan Chang , Naveen Muralimanohar , Parthasarathy Ranganathan , Robert Schreiber , Norman Paul Jouppi
CPC classification number: G06F11/085 , G06F11/1048 , G06F11/1469 , G06F11/1471 , G06F17/30424
Abstract: A detector detects, using an error code, an error in data stored in a memory. The detector determines whether the error is uncorrectable using the error code. In response to determining that the error is uncorrectable, an error handler associated with an application is invoked to handle the error in the data by recovering the data to an application-wide consistent state.
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公开(公告)号：US09601189B2
公开(公告)日：2017-03-21
申请号：US14784136
申请日：2013-04-24
Applicant: Hewlett-Packard Development Company, L.P.
Inventor： Doe Hyun Yoon , Jichuan Chang , Naveen Muralimanohar , Robert Schreiber , Norman P. Jouppi
CPC classification number: G11C11/5678 , G06F11/073 , G06F11/0793 , G06F11/1004 , G06F11/1072 , G11C11/56 , G11C13/0004 , G11C13/0069 , G11C29/42 , G11C29/52 , G11C29/70 , G11C29/76 , G11C2211/5647
Abstract: A memory device includes a group or block of k-level memory cells, where k>2, and where each of the k-level memory cells has k programmable states represented by respective resistance levels.
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公开(公告)号：US09514044B2
公开(公告)日：2016-12-06
申请号：US13902366
申请日：2013-05-24
Applicant: Hewlett-Packard Development Company, L.P.
Inventor： Jichuan Chang , Doe Hyun Yoon , Parthasarathy Ranganathan
IPC: G06F12/08
CPC classification number: G06F12/0811 , G06F12/0888 , G06F12/0897
Abstract: Disclosed herein are a computing system, integrated circuit, and method to enhance retrieval of cached data. A tracking table is used to initiate a search for data from a location specified in the table, if the data is not in a first level of a multi-level cache hierarchy.
Abstract translation: 本文公开了一种用于增强对缓存数据的检索的计算系统，集成电路和方法。 如果数据不在多级缓存层次结构的第一级，则跟踪表用于发起从表中指定的位置搜索数据。
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公开(公告)号：US20160117196A1
公开(公告)日：2016-04-28
申请号：US14898518
申请日：2013-07-31
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor： Vanish Talwar , Indrajit Roy , Kevin T. Lim , Jichuan Chang , Parthasarathy Ranganathan
CPC classification number: G06F9/5016 , G06F11/3476 , G06F13/14 , G06F2221/2101 , H04L67/1097 , Y02D10/34
Abstract: Log analysis can include transferring compiled log analysis code, executing log analysis code, and performing a log analysis on the executed log analysis code.
Abstract translation: 日志分析可以包括传送已编译的日志分析代码，执行日志分析代码，并对执行的日志分析代码执行日志分析。
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公开(公告)号：US20160062821A1
公开(公告)日：2016-03-03
申请号：US14785071
申请日：2013-05-29
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor： Doe Hyun Yoon , Jichuan Chang , Naveen Muralimanohar , Parthasarathy Ranganathan , Robert Schreiber , Norman Paul Jouppi
CPC classification number: G06F11/085 , G06F11/1048 , G06F11/1469 , G06F11/1471 , G06F17/30424
Abstract: A detector detects, using an error code, an error in data stored in a memory. The detector determines whether the error is uncorrectable using the error code. In response to determining that the error is uncorrectable, an error handler associated with an application is invoked to handle the error in the data by recovering the data to an application-wide consistent state.
Abstract translation: 检测器使用错误代码检测存储在存储器中的数据中的错误。 检测器使用错误代码确定错误是否不可校正。 响应于确定错误是不可校正的，通过将数据恢复到应用程序范围的一致状态，调用与应用程序相关联的错误处理程序来处理数据中的错误。
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Patent Agency Ranking
公开(公告)号：US20160034528A1
公开(公告)日：2016-02-04
申请号：US14775329
申请日：2013-03-15
Applicant: Indrajit ROY , Feng LIU , Vanish TALWAR , Shimin CHEN , Jichuan CHANG , Parthasarathy RANGANATHAN , HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor： Indrajit Roy , Feng Liu , Vanish Talwar , Shimin Chen , Jichuan Chang , Parthasarathy Ranganathan
IPC: G06F17/30
CPC classification number: G06F16/245 , G06F9/5005 , G06F9/5066 , G06F16/21 , G06F16/24554 , G06F16/283
Abstract: A technique includes receiving a user input in an array-oriented database. The user input indicates a database operation and processing a plurality of chunks of data stored by the database to perform the operation. The processing in dudes selectively distributing the processing of the plurality of chunks between a first group of at least one central processing unit and a second group of at least one co-processor.
Abstract translation: 一种技术包括在面向数组的数据库中接收用户输入。 用户输入指示数据库操作并处理由数据库存储的多个数据块以执行操作。 所述处理在所述至少一个中央处理单元的第一组和至少一个协处理器的第二组之间选择性地分布所述多个块的处理。
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公开(公告)号：US20140325160A1
公开(公告)日：2014-10-30
申请号：US13873459
申请日：2013-04-30
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor： Kevin T. Lim , Sai Rahul Chalamalasetti , Jichuan Chang , Mitchel E. Wright
CPC classification number: G06F12/0871 , G06F12/0864 , G06F2212/284 , G06F2212/465 , H04L67/02 , H04L67/2842 , H04L69/12
Abstract: Disclosed herein are an apparatus, an integrated circuit, and method to cache objects. At least one hash table of a circuit comprises a predetermined arrangement that maximizes cache memory space and minimizes a number of cache memory transactions. The circuit handles requests by a remote device to obtain or cache an object.
Abstract translation: 本文公开了一种用于缓存对象的装置，集成电路和方法。 电路的至少一个哈希表包括使高速缓冲存储器空间最大化并使多个高速缓存存储器事务最小化的预定布置。 电路处理远程设备的请求以获取或缓存对象。
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公开(公告)号：US20160078930A1
公开(公告)日：2016-03-17
申请号：US14784136
申请日：2013-04-24
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor： Doe Hyun Yoon , Jichuan Chang , Naveen Muralimanohar , Robert Schreiber , Norman P. Jouppi
CPC classification number: G11C11/5678 , G06F11/073 , G06F11/0793 , G06F11/1004 , G06F11/1072 , G11C11/56 , G11C13/0004 , G11C13/0069 , G11C29/42 , G11C29/52 , G11C29/70 , G11C29/76 , G11C2211/5647
Abstract: A memory device includes a group or block of k-level memory cells, where k>2, and where each of the k-level memory cells has k programmable states represented by respective resistance levels.
Abstract translation: 存储器件包括k级存储器单元的组或块，其中k≥2，并且其中每个k级存储器单元具有由各个电阻电平表示的k个可编程状态。
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公开(公告)号：US08966348B2
公开(公告)日：2015-02-24
申请号：US13689814
申请日：2012-11-30
Applicant: Hewlett-Packard Development Company, L.P.
Inventor： Doe Hyun Yoon , Jichuan Chang , Naveen Muralimanohar
IPC: G06F11/00
CPC classification number: G06F11/006 , G06F11/073 , G06F11/0751 , G06F11/10
Abstract: A system includes a memory controller, a buffer, a first channel to couple the memory controller to the buffer, and a second channel to couple the buffer to a memory. The first channel and second channel are to transmit a codeword including a plurality of symbols. A symbol is formed from a plurality of bursts based on data access of the memory. The memory controller is to identify a memory error based on a corrupted symbol pattern of the codeword. The memory controller is to discriminate between a chip failure, a first pin failure of the first channel, and a second pin failure of the second channel, as being a type of the memory error, according to the corrupted symbol pattern.
Abstract translation: 系统包括存储器控制器，缓冲器，将存储器控制器耦合到缓冲器的第一通道以及将缓冲器耦合到存储器的第二通道。 第一信道和第二信道是发送包括多个符号的码字。 基于存储器的数据访问从多个突发形成符号。 存储器控制器是基于码字的损坏符号模式来识别存储器错误。 存储器控制器根据损坏的符号图案，将芯片故障，第一通道的第一引脚故障和第二通道的第二引脚故障区别为存储器错误的类型。
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公开(公告)号：US20140351518A1
公开(公告)日：2014-11-27
申请号：US13902366
申请日：2013-05-24
Applicant: Hewlett-Packard Development Company, L.P.
Inventor： Jichuan Chang , Doe Hyun Yoon , Parthasarathy Ranganathan
IPC: G06F12/08
CPC classification number: G06F12/0811 , G06F12/0888 , G06F12/0897
Abstract: Disclosed herein are a computing system, integrated circuit, and method to enhance retrieval of cached data. A tracking table is used to initiate a search for data from a location specified in the table, if the data is not in a first level of a multi-level cache hierarchy.
Abstract translation: 本文公开了一种用于增强对缓存数据的检索的计算系统，集成电路和方法。 如果数据不在多级缓存层次结构的第一级，则跟踪表用于发起从表中指定的位置搜索数据。
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