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公开(公告)号:US20140215481A1
公开(公告)日:2014-07-31
申请号:US13756155
申请日:2013-01-31
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor: Peter Piet , Robert Schreiber , Helen W. Cheung , Timothy F. Forell , Moray McLaren , Dejan S . Milojicic
IPC: G06F9/50
CPC classification number: G06F9/5061 , G06F11/008 , G06F11/1438 , G06F11/2041 , G06F11/2046 , G06F11/2097
Abstract: Assigning nodes to jobs based on reliability factors includes calculating the maximum value of a processor utilization efficiency and assigning an optimal number of spare nodes to the job based on the value of the processor utilization efficiency.
Abstract translation: 基于可靠性因素将节点分配给作业包括计算处理器利用效率的最大值,并且基于处理器利用效率的值为作业分配最佳数量的备用节点。
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2.
公开(公告)号:US20160062821A1
公开(公告)日:2016-03-03
申请号:US14785071
申请日:2013-05-29
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor: Doe Hyun Yoon , Jichuan Chang , Naveen Muralimanohar , Parthasarathy Ranganathan , Robert Schreiber , Norman Paul Jouppi
CPC classification number: G06F11/085 , G06F11/1048 , G06F11/1469 , G06F11/1471 , G06F17/30424
Abstract: A detector detects, using an error code, an error in data stored in a memory. The detector determines whether the error is uncorrectable using the error code. In response to determining that the error is uncorrectable, an error handler associated with an application is invoked to handle the error in the data by recovering the data to an application-wide consistent state.
Abstract translation: 检测器使用错误代码检测存储在存储器中的数据中的错误。 检测器使用错误代码确定错误是否不可校正。 响应于确定错误是不可校正的,通过将数据恢复到应用程序范围的一致状态,调用与应用程序相关联的错误处理程序来处理数据中的错误。
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公开(公告)号:US20140282594A1
公开(公告)日:2014-09-18
申请号:US13799176
申请日:2013-03-13
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor: Indrajit Roy , Erik Tamas Bodzsar , Robert Schreiber
IPC: G06F9/54
CPC classification number: G06F9/5066
Abstract: A technique includes distributing a plurality of tasks among a plurality of worker nodes to perform a processing operation on an array. Each task is associated with a set of a least one data block of the array, and an order of the tasks is defined by an array-based programming language. Distribution of the tasks includes, for at least one of the worker nodes, selectively reordering the order defined by the array-based programming language to regulate an amount of data transferred to the worker node.
Abstract translation: 一种技术包括在多个工作节点之间分配多个任务以对阵列执行处理操作。 每个任务与阵列的至少一个数据块的集合相关联,并且任务的顺序由基于阵列的编程语言定义。 任务的分布包括对于至少一个工作节点,选择性地重新排序由基于阵列的编程语言定义的顺序以调节传送到工作节点的数据量。
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公开(公告)号:US20140137134A1
公开(公告)日:2014-05-15
申请号:US13673702
申请日:2012-11-09
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor: Indrajit ROY , Shivaram Venkataraman , Alvin Auyoung , Robert Schreiber
IPC: G06F9/46
CPC classification number: G06F9/5083 , G06F9/5061
Abstract: A sparse array is partitioned into first partitions and a second array is partitioned into second partitions based on an invariant relationship between the sparse array and the second array. The sparse array and the second array are associated with a computation involving the sparse array and the second array. The first partitions and the corresponding second partitions are distributed to workers. A different first partition and corresponding second partition is distributed to each of the workers. Third partitions of the sparse array and corresponding fourth partitions of the second array are determined based on the invariant relationship and measurements of load are received from each of the workers. At least one of the first partitions and the corresponding second partition is different from one of the third partitions and the corresponding fourth partition. The at least one of the first partitions and the corresponding second partition that is different is redistributed among the workers. A different third partition and corresponding fourth partition is executed by each of the workers.
Abstract translation: 稀疏阵列被划分成第一分区,并且基于稀疏阵列和第二阵列之间的不变关系将第二阵列划分成第二分区。 稀疏阵列和第二个阵列与涉及稀疏阵列和第二个阵列的计算相关联。 第一个分区和相应的第二个分区分配给工作人员。 将不同的第一分区和相应的第二分区分配给每个工作者。 基于不变关系确定稀疏阵列的第三分区和第二阵列的相应的第四分区,并且从每个工人接收到负载的测量。 第一分区和对应的第二分区中的至少一个与第三分区和相应的第四分区之一不同。 第一分区中的至少一个和相应的不同的第二分区在工作者之间重新分配。 每个工人执行不同的第三分区和相应的第四分区。
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5.
公开(公告)号:US20160078930A1
公开(公告)日:2016-03-17
申请号:US14784136
申请日:2013-04-24
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor: Doe Hyun Yoon , Jichuan Chang , Naveen Muralimanohar , Robert Schreiber , Norman P. Jouppi
CPC classification number: G11C11/5678 , G06F11/073 , G06F11/0793 , G06F11/1004 , G06F11/1072 , G11C11/56 , G11C13/0004 , G11C13/0069 , G11C29/42 , G11C29/52 , G11C29/70 , G11C29/76 , G11C2211/5647
Abstract: A memory device includes a group or block of k-level memory cells, where k>2, and where each of the k-level memory cells has k programmable states represented by respective resistance levels.
Abstract translation: 存储器件包括k级存储器单元的组或块,其中k≥2,并且其中每个k级存储器单元具有由各个电阻电平表示的k个可编程状态。
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公开(公告)号:US09189290B2
公开(公告)日:2015-11-17
申请号:US13799176
申请日:2013-03-13
Applicant: Hewlett-Packard Development Company, L.P.
Inventor: Indrajit Roy , Erik Tamas Bodzsar , Robert Schreiber
CPC classification number: G06F9/5066
Abstract: A technique includes distributing a plurality of tasks among a plurality of worker nodes to perform a processing operation on an array. Each task is associated with a set of a least one data block of the array, and an order of the tasks is defined by an array-based programming language. Distribution of the tasks includes, for at least one of the worker nodes, selectively reordering the order defined by the array-based programming language to regulate an amount of data transferred to the worker node.
Abstract translation: 一种技术包括在多个工作节点之间分配多个任务以对阵列执行处理操作。 每个任务与阵列的至少一个数据块的集合相关联,并且任务的顺序由基于阵列的编程语言定义。 任务的分布包括对于至少一个工作节点,选择性地重新排序由基于阵列的编程语言定义的顺序以调节传送到工作节点的数据量。
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公开(公告)号:US09411657B2
公开(公告)日:2016-08-09
申请号:US13673702
申请日:2012-11-09
Applicant: Hewlett-Packard Development Company, L.P.
Inventor: Indrajit Roy , Shivaram Venkataraman , Alvin Auyoung , Robert Schreiber
CPC classification number: G06F9/5083 , G06F9/5061
Abstract: A sparse array is partitioned into first partitions and a second array is partitioned into second partitions based on an invariant relationship between the sparse array and the second array. The sparse array and the second array are associated with a computation involving the sparse array and the second array. The first partitions and the corresponding second partitions are distributed to workers. A different first partition and corresponding second partition is distributed to each of the workers. Third partitions of the sparse array and corresponding fourth partitions of the second array are determined based on the invariant relationship and measurements of load are received from each of the workers. At least one of the first partitions and the corresponding second partition is different from one of the third partitions and the corresponding fourth partition. The at least one of the first partitions and the corresponding second partition that is different is redistributed among the workers. A different third partition and corresponding fourth partition is executed by each of the workers.
Abstract translation: 稀疏阵列被划分成第一分区,并且基于稀疏阵列和第二阵列之间的不变关系将第二阵列划分成第二分区。 稀疏阵列和第二个阵列与涉及稀疏阵列和第二个阵列的计算相关联。 第一个分区和相应的第二个分区分配给工作人员。 将不同的第一分区和相应的第二分区分配给每个工作者。 基于不变关系确定稀疏阵列的第三分区和第二阵列的相应的第四分区,并且从每个工人接收到负载的测量。 第一分区和对应的第二分区中的至少一个与第三分区和相应的第四分区之一不同。 第一分区中的至少一个和相应的不同的第二分区在工作者之间重新分配。 每个工人执行不同的第三分区和相应的第四分区。
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8.
公开(公告)号:US20150309873A1
公开(公告)日:2015-10-29
申请号:US14648290
申请日:2012-11-30
Applicant: Hewlett-Packard Development Company, L.P.
Inventor: Doe Hyun Yoon , Robert Schreiber , Sheng Li
CPC classification number: G06F11/1076 , G06F11/1012 , G06F13/1636 , G11C2029/0411 , G11C2207/105 , H03M13/1515
Abstract: A memory controller is to interface with a memory, associated with a plurality of pins, based on a codeword. The codeword is to include a plurality of n-bit symbols. An n-bit symbol of the codeword is to be formed from a plurality of n bursts over time associated with one of the pins of the memory.
Abstract translation: 存储器控制器将基于码字与与多个引脚相关联的存储器进行接口。 码字将包括多个n位符号。 代码字的n位符号将由与存储器的一个引脚相关联的时间的多个n个突发形成。
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公开(公告)号:US09934085B2
公开(公告)日:2018-04-03
申请号:US14785071
申请日:2013-05-29
Applicant: Hewlett-Packard Development Company, L.P.
Inventor: Doe-Hyun Yoon , Jichuan Chang , Naveen Muralimanohar , Parthasarathy Ranganathan , Robert Schreiber , Norman Paul Jouppi
CPC classification number: G06F11/085 , G06F11/1048 , G06F11/1469 , G06F11/1471 , G06F17/30424
Abstract: A detector detects, using an error code, an error in data stored in a memory. The detector determines whether the error is uncorrectable using the error code. In response to determining that the error is uncorrectable, an error handler associated with an application is invoked to handle the error in the data by recovering the data to an application-wide consistent state.
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公开(公告)号:US09601189B2
公开(公告)日:2017-03-21
申请号:US14784136
申请日:2013-04-24
Applicant: Hewlett-Packard Development Company, L.P.
Inventor: Doe Hyun Yoon , Jichuan Chang , Naveen Muralimanohar , Robert Schreiber , Norman P. Jouppi
CPC classification number: G11C11/5678 , G06F11/073 , G06F11/0793 , G06F11/1004 , G06F11/1072 , G11C11/56 , G11C13/0004 , G11C13/0069 , G11C29/42 , G11C29/52 , G11C29/70 , G11C29/76 , G11C2211/5647
Abstract: A memory device includes a group or block of k-level memory cells, where k>2, and where each of the k-level memory cells has k programmable states represented by respective resistance levels.
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