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    STORAGE SYSTEM AND DATA CONTROL METHOD
    2.
    发明申请
    STORAGE SYSTEM AND DATA CONTROL METHOD 审中-公开

    公开(公告)号：US20200034067A1

    公开(公告)日：2020-01-30

    申请号：US16594762

    申请日：2019-10-07

    Applicant: HITACHI, LTD.

    Inventor： Takahiro YAMAMOTO ,  Kazuhisa FUJIMOTO ,  Hiroaki AKUTSU

    IPC: G06F3/06

    Abstract: A storage system and data control method capable of extending the service lifes of storage devices of the same type and with different properties and reducing operation management cost are proposed. The storage system includes: a first storage device; a second storage device with a smaller upper limit number of writes and a larger storage capacity per unit area than those of the first storage device; and a processor that allocates storage areas from the first storage device and the second storage device to a virtual volume to be provided to a host, wherein the processor relocates data which is stored in a storage area with higher write frequency from the host than a predetermined write threshold, from among the storage areas allocated from the second storage device to the virtual volume, from the storage area of the second storage device to a storage area of the first storage device.

    NON-VOLATILE MEMORY DEVICE
    3.
    发明申请
    NON-VOLATILE MEMORY DEVICE 审中-公开

    公开(公告)号：US20180067850A1

    公开(公告)日：2018-03-08

    申请号：US15551312

    申请日：2015-02-27

    Applicant: HITACHI, LTD.

    Inventor： Atsushi KAWAMURA ,  Masahiro ARAI ,  Kazuhisa FUJIMOTO

    IPC: G06F12/02 ,  G06F3/06 ,  G11C16/34 ,  G11C16/16

    CPC classification number: G06F12/0246 ,  G06F3/064 ,  G06F3/0646 ,  G06F3/0647 ,  G06F3/0652 ,  G06F3/0679 ,  G06F12/00 ,  G06F12/02 ,  G06F12/16 ,  G11C16/16 ,  G11C16/3495

    Abstract: A write frequency of a non-volatile memory is determined at a fine granularity while suppressing consumption of the volatile memory. When it is determined that a copy of specified data from a specified physical storage area to another physical storage area is to be executed, a controller reads the specified data and specified write frequency information, selects a write destination physical storage area group from a plurality of physical storage area groups based on the specified write frequency information and classification information, selects a write destination physical storage area from the write destination physical storage area group, changes the specified write frequency information, writes the specified data to the write destination physical storage area, writes the changed specified write frequency information to the non-volatile memory, and updates translation information based on the write destination physical storage area group and the write destination physical storage area.

    FLASH MEMORY STORAGE SYSTEM
    4.
    发明申请
    FLASH MEMORY STORAGE SYSTEM 审中-公开
    闪存存储系统

    公开(公告)号：US20130103895A1

    公开(公告)日：2013-04-25

    申请号：US13716326

    申请日：2012-12-17

    Applicant: HITACHI, LTD

    Inventor： Takashige IWAMURA ,  Kazuhisa FUJIMOTO ,  Yoshiaki EGUCHI ,  Shunji KAWAMURA

    IPC: G06F12/02

    CPC classification number: G06F12/0246 ,  G11C16/349

    Abstract: A flash memory storage system has a plurality of flash memory devices comprising a plurality of flash memories, and a controller having an I/O processing control unit for accessing a flash memory device specified by a designated access destination in an I/O request received from an external device from among the plurality of flash memory devices. A parity group can be configured of flash memory devices having identical internal configuration.

    Abstract translation: 闪速存储器存储系统具有包括多个闪存的多个闪速存储器，以及具有I / O处理控制单元的控制器，该I / O处理控制单元用于访问由指定的访问目的地指定的闪存设备， 来自多个闪存设备中的外部设备。 可以配置具有相同内部配置的闪存设备的奇偶校验组。

    COMPUTING SYSTEM AND SERVER
    5.
    发明申请
    COMPUTING SYSTEM AND SERVER 审中-公开

    公开(公告)号：US20190324969A1

    公开(公告)日：2019-10-24

    申请号：US16081023

    申请日：2016-04-27

    Applicant: Hitachi, Ltd.

    Inventor： Kazuhisa FUJIMOTO ,  Shinji FUJIWARA ,  Satoru WATANABE ,  Akira YAMAMOTO

    IPC: G06F16/245 ,  G06F3/06 ,  G06F9/38

    Abstract: A storage device, connected to a computer including a processor and first memory, and executing a program, stores data processed under the program. The computer includes a protocol processing unit that accesses data in the storage device, an accelerator that includes an arithmetic unit executing a part of a process of the program, and a second memory storing data, and executes the part of the process. The first memory receives a processing request for processing data, and causes the accelerator to execute a command to process data, corresponding to the processing request for the processing request including a process to be executed by the arithmetic unit. The accelerator requests the protocol processing unit to provide target data indicated by a command received from the program, reads data from the storage device via the protocol processing unit, and stores the data in the second memory. The arithmetic unit executes the command.

    SYSTEM AND METHOD FOR ASSISTING CHARGING TO USE OF ACCELERATOR UNIT
    9.
    发明申请
    SYSTEM AND METHOD FOR ASSISTING CHARGING TO USE OF ACCELERATOR UNIT 审中-公开

    公开(公告)号：US20190129755A1

    公开(公告)日：2019-05-02

    申请号：US16125145

    申请日：2018-09-07

    Applicant: HITACHI, LTD.

    Inventor： Yoshifumi FUJIKAWA ,  Kazuhisa FUJIMOTO ,  Toshiyuki ARITSUKA ,  Kazushi NAKAGAWA

    IPC: G06F9/50 ,  H04L12/911 ,  H04L12/24

    Abstract: A charging assistant system that assists charging for use of an accelerator unit, which is one or more accelerators, includes an operation amount obtaining unit, an acceleration rate estimation unit, and a use fee determination unit. For each of one or more commands input into the accelerator unit, the operation amount obtaining unit obtains the amount of operation related to execution of the command from a response output from the accelerator unit for the command. For the one or more commands input into the accelerator unit, the acceleration rate estimation unit estimates an acceleration rate on the basis of command execution time that is time required for processing of the one or more commands, and one or more amounts of operation obtained for the one or more commands respectively. The use fee determination unit determines a use fee of the accelerator unit on the basis of the estimated acceleration rate.

    STORAGE SYSTEM AND DATA CONTROL METHOD
    10.
    发明申请
    STORAGE SYSTEM AND DATA CONTROL METHOD 审中-公开

    公开(公告)号：US20180039444A1

    公开(公告)日：2018-02-08

    申请号：US15554537

    申请日：2015-04-09

    Applicant: HITACHI, LTD.

    Inventor： Takahiro YAMAMOTO ,  Kazuhisa FUJIMOTO ,  Hiroaki AKUTSU

    IPC: G06F3/06

    CPC classification number: G06F3/0647 ,  G06F3/0616 ,  G06F3/0649 ,  G06F3/0665 ,  G06F3/067 ,  G06F3/0688

    Abstract: A storage system and data control method capable of extending the service lifes of storage devices of the same type and with different properties and reducing operation management cost are proposed. The storage system includes: a first storage device; a second storage device with a smaller upper limit number of writes and a larger storage capacity per unit area than those of the first storage device; and a processor that allocates storage areas from the first storage device and the second storage device to a virtual volume to be provided to a host, wherein the processor relocates data which is stored in a storage area with higher write frequency from the host than a predetermined write threshold, from among the storage areas allocated from the second storage device to the virtual volume, from the storage area of the second storage device to a storage area of the first storage device.

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