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29 条记录 (耗时 0.024 秒)

    Non-volatile circuit that disables failed devices
    1.
    发明授权
    Non-volatile circuit that disables failed devices 失效
    禁用故障设备的非易失性电路

    公开(公告)号：US5859803A

    公开(公告)日：1999-01-12

    申请号：US925020

    申请日：1997-09-08

    申请人： Hagop Nazarian ,  David Sowards ,  Lawrence D. Engh ,  Jung Sheng Hoei ,  May Lee

    发明人： Hagop Nazarian ,  David Sowards ,  Lawrence D. Engh ,  Jung Sheng Hoei ,  May Lee

    IPC分类号： G11C29/52 ,  G11C7/00 ,  H01L21/00

    CPC分类号： G11C29/52

    摘要： The present invention discloses a circuit for controlling operation of a functional circuit in a device based on a test result during testing. The circuit comprises a first storage element configured to be in one of a first state and a second state according to the test result, and a first sensing element coupled to the first storage element for generating a first signal used to control the operation of the functional circuit.

    摘要翻译： 本发明公开了一种电路，用于根据测试中的测试结果控制设备中的功能电路的操作。 电路包括根据测试结果被配置为处于第一状态和第二状态之一的第一存储元件，以及耦合到第一存储元件的第一感测元件，用于产生用于控制功能的操作的第一信号 电路。

    AC coupling and signal amplification using switched capacitors
    3.
    发明授权
    AC coupling and signal amplification using switched capacitors 失效
    使用开关电容的交流耦合和信号放大

    公开(公告)号：US6035049A

    公开(公告)日：2000-03-07

    申请号：US924215

    申请日：1997-09-05

    申请人： Lawrence D. Engh ,  Jung Sheng Hoei ,  Vashal Sarin

    发明人： Lawrence D. Engh ,  Jung Sheng Hoei ,  Vashal Sarin

    IPC分类号： H03F3/00 ,  H03H19/00 ,  H03F21/00

    CPC分类号： H03H19/004 ,  H03F3/005

    摘要： AC coupling and signal amplification using switched capacitors. The use of a switched capacitor to simulate a resistor in amplifier coupling in an integrated circuit processing audio frequency signals avoids the need for external components, reducing cost and eliminating the need for pinouts for the external components. In a system including an anti-aliasing filter, capacitive coupling is used for coupling between amplifiers, with the gain of the second amplifier being set by a feedback capacitor between the amplifier output and its input, as sized relative to the coupling capacitor. The switched capacitor in the feedback loop of the second amplifier preferably couples the output of the anti-aliasing filter back to the amplifier input, thereby minimizing the aliasing from the capacitor switching.

    摘要翻译： 使用开关电容的交流耦合和信号放大。 在集成电路处理音频信号中使用开关电容器来模拟放大器耦合中的电阻器避免了对外部组件的需要，降低了成本并且消除了对外部组件的引脚分配的需要。 在包括抗混叠滤波器的系统中，电容耦合用于放大器之间的耦合，第二放大器的增益由放大器输出端与其输入端之间的反馈电容器相对于耦合电容器的尺寸来设定。 第二放大器的反馈回路中的开关电容器优选地将抗混叠滤波器的输出耦合到放大器输入端，从而使来自电容器切换的混叠最小化。

    Methods of erase verification for a flash memory device
    5.
    发明授权
    Methods of erase verification for a flash memory device 有权
    闪存设备的擦除验证方法

    公开(公告)号：US08169832B2

    公开(公告)日：2012-05-01

    申请号：US12909414

    申请日：2010-10-21

    申请人： Vishal Sarin ,  Dzung Nguyen ,  Jonathan Pabustan ,  Jung Sheng Hoei ,  Jason Guo ,  William Saiki

    发明人： Vishal Sarin ,  Dzung Nguyen ,  Jonathan Pabustan ,  Jung Sheng Hoei ,  Jason Guo ,  William Saiki

    IPC分类号： G11C11/34

    CPC分类号： G11C16/344 ,  G11C16/0483 ,  G11C16/3445

    摘要： Methods and apparatus are disclosed, such as those involving a flash memory device that includes a memory block. The memory block includes a plurality of data lines extending substantially parallel to one another, and a plurality of memory cells. One such method includes erasing the memory cells; and performing erase verification on the memory cells. The erase verification includes determining one memory cell by one memory cell whether the individual memory cells coupled to one of the data lines have been erased. The method can also include performing a re-erase operation that selectively re-erases unerased memory cells based at least partly on the result of the erase verification.

    摘要翻译： 公开了诸如涉及包括存储器块的闪速存储器件的方法和装置。 存储块包括基本上彼此平行延伸的多条数据线，以及多个存储单元。 一种这样的方法包括擦除存储器单元; 并对存储器单元执行擦除验证。 擦除验证包括由一个存储器单元确定耦合到数据线之一中的各个存储器单元是否已经被擦除的一个存储器单元。 该方法还可以包括执行至少部分地基于擦除验证的结果来选择性地重新擦除未故障存储器单元的重擦除操作。

    MEMORY CELL SENSING DEVICES AND METHODS
    6.
    发明申请
    MEMORY CELL SENSING DEVICES AND METHODS 有权
    记忆细胞感测装置和方法

    公开(公告)号：US20110242900A1

    公开(公告)日：2011-10-06

    申请号：US12751575

    申请日：2010-03-31

    申请人： Jung Sheng Hoei

    发明人： Jung Sheng Hoei

    IPC分类号： G11C16/04 ,  G11C16/06

    CPC分类号： G11C16/3454 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/26 ,  G11C16/32 ,  G11C27/005 ,  G11C2211/5621 ,  G11C2211/5644

    摘要： The present disclosure includes methods, devices, and systems for sensing memory cells. One or more embodiments include providing an output of a first counter to a digital-to-analog converter (DAC). An output of the DAC can correspond to a ramping voltage provided to a control gate of the memory cell. An output of a second counter can be provided to sensing circuitry coupled to a sense line of the memory cell. Conduction of the sense line in response to the ramping voltage can be sensed, and an output value of the second counter can be determined in response to the sensed conduction of the sense line.

    摘要翻译： 本公开包括用于感测存储器单元的方法，装置和系统。 一个或多个实施例包括向数模转换器（DAC）提供第一计数器的输出。 DAC的输出可以对应于提供给存储器单元的控制栅极的斜坡电压。 可以将第二计数器的输出提供给耦合到存储器单元的感测线的感测电路。 可以感测响应于斜坡电压的感测线的传导，并且可以响应于所感测的感测线的传导来确定第二计数器的输出值。

    Non-volatile multilevel memory cells with data read of reference cells
    7.
    发明授权
    Non-volatile multilevel memory cells with data read of reference cells 有权
    具有参考单元数据读取的非易失性多电平存储单元

    公开(公告)号：US07577036B2

    公开(公告)日：2009-08-18

    申请号：US11799658

    申请日：2007-05-02

    申请人： Vishal Sarin ,  Jung Sheng Hoei ,  Frankie F. Roohpavar

    发明人： Vishal Sarin ,  Jung Sheng Hoei ,  Frankie F. Roohpavar

    IPC分类号： G11C16/06

    CPC分类号： G11C16/3418 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/349 ,  G11C2211/5634

    摘要： Embodiments of the present disclosure provide methods, devices, modules, and systems for non-volatile multilevel memory cell data retrieval with data read of reference cells. One method includes programming at least one data cell of a number of data cells coupled to a selected word line to a target data threshold voltage (Vt) level corresponding to a target state; programming at least one reference cell of a number of reference cells coupled to the selected word line to a target reference Vt level, the number of reference cells interleaved with the number of data cells; determining a reference state based on a data read of the at least one reference cell; and changing a state read from the at least one data cell based on a change of the at least one reference cell.

    摘要翻译： 本公开的实施例提供用于参考单元的数据读取的用于非易失性多级存储器单元数据检索的方法，设备，模块和系统。 一种方法包括将耦合到所选字线的多个数据单元的至少一个数据单元编程为对应于目标状态的目标数据阈值电压（Vt）电平; 将耦合到所选字线的多个参考单元的至少一个参考单元编程为目标参考Vt电平，与数据单元数量交织的参考单元的数量; 基于所述至少一个参考单元的数据读取确定参考状态; 以及基于所述至少一个参考单元的改变来改变从所述至少一个数据单元读取的状态。

    Expanded programming window for non-volatile multilevel memory cells
    10.
    发明授权
    Expanded programming window for non-volatile multilevel memory cells 有权
    用于非易失性多级存储器单元的扩展编程窗口

    公开(公告)号：US08289776B2

    公开(公告)日：2012-10-16

    申请号：US12971587

    申请日：2010-12-17

    申请人： Vishal Sarin ,  Jung Sheng Hoei ,  Frankie F. Roohparvar

    发明人： Vishal Sarin ,  Jung Sheng Hoei ,  Frankie F. Roohparvar

    IPC分类号： G11C16/26

    CPC分类号： G11C11/5642 ,  G11C16/0483 ,  G11C2211/5621

    摘要： Embodiments of the present disclosure provide methods, devices, modules, and systems for utilizing an expanded programming window for non-volatile multilevel memory cells. One method includes associating a different logical state with each of a number of different threshold voltage (Vt) distributions. In various embodiments, at least two Vt distributions include negative Vt levels. The method includes applying a read voltage to a word line of a selected cell while applying a pass voltage to word lines of unselected cells, applying a boost voltage to a source line coupled to the selected cell, applying a voltage greater than the boost voltage to a bit line of the selected cell, and sensing a current variation of the bit line in response to the selected cell changing from a non-conducting state to a conducting state.

    摘要翻译： 本公开的实施例提供了用于利用用于非易失性多层存储器单元的扩展编程窗口的方法，设备，模块和系统。 一种方法包括将不同的逻辑状态与多个不同的阈值电压（Vt）分布中的每一个相关联。 在各种实施例中，至少两个Vt分布包括负Vt电平。 该方法包括将读取电压施加到所选择的单元的字线，同时向未选择的单元的字线施加通过电压，向耦合到所选择的单元的源极线施加升压电压，将大于升压电压的电压施加到 所选择的单元的位线，并且响应于所选择的单元从非导通状态改变到导通状态来感测位线的当前变化。