Silicon-on-insulator chip having multiple crystal orientations
    6.
    发明申请
    Silicon-on-insulator chip having multiple crystal orientations 有权
    具有多个晶体取向的绝缘体上硅芯片

    公开(公告)号:US20070145481A1

    公开(公告)日:2007-06-28

    申请号:US11315069

    申请日:2005-12-22

    IPC分类号: H01L27/12

    摘要: A silicon-on-insulator device having multiple crystal orientations is disclosed. In one embodiment, the silicon-on-insulator device includes a substrate layer, an insulating layer disposed on the substrate layer, a first silicon layer, and a strained silicon layer. The first silicon layer has a first crystal orientation and is disposed on a portion of the insulating layer, and the strained silicon layer is disposed on another portion of the insulating layer and has a crystal orientation different from the first crystal orientation.

    摘要翻译: 公开了具有多个晶体取向的绝缘体上硅器件。 在一个实施例中,绝缘体上硅器件包括衬底层,设置在衬底层上的绝缘层,第一硅层和应变硅层。 第一硅层具有第一晶体取向并且设置在绝缘层的一部分上,并且应变硅层设置在绝缘层的另一部分上并且具有不同于第一晶体取向的晶体取向。

    Capacitors and Methods of Manufacture Thereof
    8.
    发明申请
    Capacitors and Methods of Manufacture Thereof 有权
    电容器及其制造方法

    公开(公告)号:US20110037146A1

    公开(公告)日:2011-02-17

    申请号:US12912543

    申请日:2010-10-26

    IPC分类号: H01L29/92

    摘要: Capacitors are formed in metallization layers of semiconductor device in regions where functional conductive features are not formed, more efficiently using real estate of integrated circuits. The capacitors may be stacked and connected in parallel to provide increased capacitance, or arranged in arrays. The plates of the capacitors are substantially the same dimensions as conductive features, such as conductive lines or vias, or are substantially the same dimensions as fill structures of the semiconductor device.

    摘要翻译: 在没有形成功能导电特征的区域中,半导体器件的金属化层中形成电容器,更有效地利用集成电路的空间。 电容器可以堆叠并联并联以提供增加的电容,或者排列成阵列。 电容器的板与诸如导电线或通孔的导电特征基本相同,或者与半导体器件的填充结构基本相同的尺寸。

    Methods of manufacturing semiconductor devices with rotated substrates
    9.
    发明申请
    Methods of manufacturing semiconductor devices with rotated substrates 有权
    制造具有旋转衬底的半导体器件的方法

    公开(公告)号:US20070173003A1

    公开(公告)日:2007-07-26

    申请号:US11710382

    申请日:2007-02-23

    IPC分类号: H01L21/337

    摘要: Integrated circuits are oriented on a substrate at an angle that is rotated between 5 to 40 degrees from a direction parallel or perpendicular to a preferred crystalline plane direction, such as the cleavage plane, of the substrate. Parameters such as stress and mobility of transistors may be optimized by adjusting the angle of rotation of the substrate. For a rotated substrate CMOS device design, other stress control measures may be used, such as a stress control or tensile liner, over an NMOS transistor, PMOS transistor, or both, to further adjust the stress and improve performance.

    摘要翻译: 集成电路在基板上以与基板的优选晶面方向(例如解理面)平行或垂直的方向旋转5至40度的角度定向在基板上。 诸如晶体管的应力和迁移率的参数可以通过调节衬底的旋转角来优化。 对于旋转的衬底CMOS器件设计,可以使用其他应力控制措施,例如应力控制或拉伸衬垫,通过NMOS晶体管,PMOS晶体管或两者,以进一步调节应力并提高性能。

    Semiconductor devices with rotated substrates and methods of manufacture thereof
    10.
    发明授权
    Semiconductor devices with rotated substrates and methods of manufacture thereof 有权
    具有旋转基板的半导体器件及其制造方法

    公开(公告)号:US07205639B2

    公开(公告)日:2007-04-17

    申请号:US11076080

    申请日:2005-03-09

    IPC分类号: H01L29/04 H01L31/00

    摘要: Integrated circuits are oriented on a substrate at an angle that is rotated between 0 to 45 degrees from a direction parallel or perpendicular to a preferred crystalline plane direction, such as the cleavage plane, of the substrate. Parameters such as stress and mobility of transistors may be optimized by adjusting the angle of rotation of the substrate. For a rotated substrate CMOS device design, other stress control measures may be used, such as a stress control or tensile liner, over an NMOS transistor, PMOS transistor, or both, to further adjust the stress and improve performance.

    摘要翻译: 集成电路在基板上以与基板的优选晶面方向(例如解理面)平行或垂直的方向在0至45度之间旋转的角度定向在基板上。 诸如晶体管的应力和迁移率的参数可以通过调节衬底的旋转角来优化。 对于旋转的衬底CMOS器件设计,可以使用其他应力控制措施,例如应力控制或拉伸衬垫,通过NMOS晶体管,PMOS晶体管或两者,以进一步调节应力并提高性能。