公开(公告)号：US5751050A

公开(公告)日：1998-05-12

申请号：US736506

申请日：1996-10-24

申请人： Hiraku Ishikawa ,  Tatsuya Usami

发明人： Hiraku Ishikawa ,  Tatsuya Usami

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/316 ,  H01L21/822 ,  H01L27/06 ,  H01L31/0368

CPC分类号： H01L28/20 ,  H01L27/0629 ,  H01L27/0688

摘要： A base insulator film comprised of a silicon oxide film or the like is formed on the surface of a silicon substrate, and a non-doped polysilicon film (resistor layer) is selectively formed on the base insulator film by thermal CVD. A first silicon oxide film and a BPSG film are sequentially formed on the entire surfaces of the base insulator film and the polysilicon film. Then, two openings which reach the polysilicon film are formed in the BPSG film and the first silicon oxide film, and an impurity is selectively doped into the surface of the polysilicon film through those openings. As a result, a high-resistance section is formed in the polysilicon film between the two openings. Then, the openings are filled with metal layers, and then metal wires to be connected to the metal layers are formed on the surface of the BPSG film. Then, a second silicon oxide film is formed on the entire surfaces of the BPSG film and the metal wires by bias ECR (Electron Cyclotron Resonance)--CVD having a high electric field to coat the metal wires and the like. The high electric field ECR-CVD deposition increases the hydrogen atomic concentration of the polysilicon resistor layer so as to stabilize the resistance against diffusion of lower atomic concentrations of incidental hydrogen atoms from various other interlayer insulating layers.

摘要翻译： 在硅衬底的表面上形成由氧化硅膜等构成的基底绝缘膜，通过热CVD在基底绝缘膜上选择性地形成非掺杂多晶硅膜（电阻层）。 在基底绝缘体膜和多晶硅膜的整个表面上依次形成第一氧化硅膜和BPSG膜。 然后，在BPSG膜和第一氧化硅膜中形成到达多晶硅膜的两个开口，并且通过这些开口将杂质选择性地掺杂到多晶硅膜的表面中。 结果，在两个开口之间的多晶硅膜中形成高电阻部分。 然后，用金属层填充开口，然后在BPSG膜的表面上形成要连接到金属层的金属线。 然后，通过具有高电场的偏置ECR（电子回旋共振）-CVD，在BPSG膜和金属线的整个表面上形成第二氧化硅膜以涂覆金属线等。 高电场ECR-CVD沉积增加了多晶硅电阻层的氢原子浓度，以稳定来自各种其它层间绝缘层的较低原子浓度的附带氢原子的扩散阻力。

公开(公告)号：US6157083A

公开(公告)日：2000-12-05

申请号：US864388

申请日：1997-05-28

申请人： Tatsuya Usami ,  Hiraku Ishikawa

发明人： Tatsuya Usami ,  Hiraku Ishikawa

IPC分类号： H01L21/316 ,  H01L21/768 ,  H01L23/532 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/02131 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/31629 ,  H01L21/76801 ,  H01L21/76819 ,  H01L23/5329 ,  H01L23/53295 ,  H01L21/76834 ,  H01L2924/0002

摘要： A semiconductor device is manufactured by forming a first fluorine doped plasma silicon oxide film having a high fluorine concentration on first metallic interconnections formed on a semiconductor substrate surface, forming, a second fluorine doped plasma silicon oxide film having a low fluorine concentrations on the first film, and carrying out chemical machine polishing (CMP) only on the second fluorine doped plasma silicon oxide film.

摘要翻译： 通过在形成在半导体衬底表面上的第一金属互连上形成具有高氟浓度的第一氟掺杂等离子体氧化硅膜来形成半导体器件，在第一膜上形成具有低氟浓度的第二氟掺杂等离子体氧化硅膜 ，并且仅在第二氟掺杂等离子体氧化硅膜上进行化学机械抛光（CMP）。

公开(公告)号：US06528410B1

公开(公告)日：2003-03-04

申请号：US09670290

申请日：2000-09-25

申请人： Tatsuya Usami ,  Hiraku Ishikawa

发明人： Tatsuya Usami ,  Hiraku Ishikawa

IPC分类号： H01L214763

CPC分类号： H01L21/02131 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/31629 ,  H01L21/76801 ,  H01L21/76819 ,  H01L21/76834 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device is manufactured by forming a first fluorine doped plasma silicon oxide film having a high fluorine concentration on first metallic interconnections formed on a semiconductor substrate surface, forming a second fluorine doped plasma silicon oxide film having a low fluorine concentration on the first film, and carrying out chemical machine polishing (CMP) only on the second fluorine doped plasma silicon oxide film.

摘要翻译： 通过在形成在半导体衬底表面上的第一金属互连上形成具有高氟浓度的第一氟掺杂等离子体氧化硅膜来制造半导体器件，在第一膜上形成具有低氟浓度的第二氟掺杂等离子体氧化硅膜， 并且仅在第二氟掺杂等离子体氧化硅膜上进行化学机械抛光（CMP）。

公开(公告)号：US08749058B2

公开(公告)日：2014-06-10

申请号：US13324925

申请日：2011-12-13

申请人： Tatsuya Usami ,  Hideaki Tsuchiya ,  Yukio Miura ,  Tomoyuki Nakamura ,  Koichi Ohto ,  Chikako Ohto ,  Shinji Yokogawa

发明人： Tatsuya Usami ,  Hideaki Tsuchiya ,  Yukio Miura ,  Tomoyuki Nakamura ,  Koichi Ohto ,  Chikako Ohto ,  Shinji Yokogawa

IPC分类号： H01L29/72

CPC分类号： H01L23/53295 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0234 ,  H01L21/3105 ,  H01L21/76826 ,  H01L21/76834 ,  H01L23/5226 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： The semiconductor device includes an interlayer insulating film, a wiring provided in the interlayer insulating film, and a SiN film provided over the interlayer insulating film and over the wiring. The peak positions of Si—N bonds of the SiN film, which are measured by FTIR, are within the range of 845 cm−1 to 860 cm−1. This makes it possible to inhibit current leakage in a silicon nitride film, which is a barrier insulating film for preventing the diffusion of wiring metal.

摘要翻译： 半导体器件包括层间绝缘膜，设置在层间绝缘膜中的布线以及设置在层间绝缘膜上并在布线上的SiN膜。 通过FTIR测量的SiN膜的Si-N键的峰位置在845cm -1至860cm -1的范围内。 这使得可以抑制作为用于防止布线金属扩散的阻挡绝缘膜的氮化硅膜中的电流泄漏。

公开(公告)号：US08617914B2

公开(公告)日：2013-12-31

申请号：US13137847

申请日：2011-09-16

申请人： Tatsuya Usami

发明人： Tatsuya Usami

IPC分类号： H01L21/00

CPC分类号： H01L21/76811 ,  H01L21/76808 ,  H01L23/585 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of producing a semiconductor device includes forming, on a first insulating film formed on a substrate, a first groove in an element-forming region to form one of a via and a wiring therein, and a first seal ring groove in a seal ring part, forming one of a via and a wiring in the first groove and a first metal layer in the first seal ring groove, and then removing the metal material in a part exposed to an outside of the first groove and the first seal ring groove, forming a second insulating film on the first insulating film, forming, on the second insulating film, a second groove, and a second seal ring groove in the seal ring part on the first seal ring groove, and forming one of a via and a wiring in the second groove and a second metal layer.

摘要翻译： 一种制造半导体器件的方法包括在形成在基板上的第一绝缘膜上形成元件形成区域中的第一槽，以在其中形成通孔和布线之一，以及密封环中的第一密封环槽 在第一槽中形成通孔和配线之一，在第一密封环槽中形成第一金属层，然后在暴露于第一槽和第一密封环槽的外侧的部分除去金属材料， 在所述第一绝缘膜上形成第二绝缘膜，在所述第二绝缘膜上形成所述第一密封环槽中的所述密封环部分中的第二槽和第二密封环槽，并且形成通孔和布线 在第二槽和第二金属层中。

公开(公告)号：US20120181694A1

公开(公告)日：2012-07-19

申请号：US13324925

申请日：2011-12-13

申请人： Tatsuya Usami ,  Hideaki Tsuchiya ,  Yukio Miura ,  Tomoyuki Nakamura ,  Koichi Ohto ,  Chikako Ohto ,  Shinji Yokogawa

发明人： Tatsuya Usami ,  Hideaki Tsuchiya ,  Yukio Miura ,  Tomoyuki Nakamura ,  Koichi Ohto ,  Chikako Ohto ,  Shinji Yokogawa

IPC分类号： H01L23/532 ,  H01L21/768

CPC分类号： H01L23/53295 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0234 ,  H01L21/3105 ,  H01L21/76826 ,  H01L21/76834 ,  H01L23/5226 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： The semiconductor device includes an interlayer insulating film, a wiring provided in the interlayer insulating film, and a SiN film provided over the interlayer insulating film and over the wiring. The peak positions of Si—N bonds of the SiN film, which are measured by FTIR, are within the range of 845 cm−1 to 860 cm−1. This makes it possible to inhibit current leakage in a silicon nitride film, which is a barrier insulating film for preventing the diffusion of wiring metal.

摘要翻译： 半导体器件包括层间绝缘膜，设置在层间绝缘膜中的布线以及设置在层间绝缘膜上并在布线上的SiN膜。 通过FTIR测量的SiN膜的Si-N键的峰位置在845cm -1至860cm -1的范围内。 这使得可以抑制作为用于防止布线金属扩散的阻挡绝缘膜的氮化硅膜中的电流泄漏。

公开(公告)号：US07969010B2

公开(公告)日：2011-06-28

申请号：US11362110

申请日：2006-02-27

申请人： Tatsuya Usami

发明人： Tatsuya Usami

IPC分类号： H01L21/31

CPC分类号： H01L21/7682 ,  H01L21/76825 ,  H01L21/76829 ,  H01L21/76852 ,  H01L21/76885 ,  H01L21/76889 ,  H01L23/5222 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： A semiconductor device has a semiconductor substrate, a first interconnect made of a copper-containing metal which is formed over the semiconductor substrate, a conductive first plug formed over the first interconnect and connected to the first interconnect, a Cu silicide layer over the first interconnect in an area other than the area where the first plug is formed, a Cu silicide layer over the first plug, and a first porous MSQ film formed over an area from the side surface of the first interconnect to the side surface of the first plug and covering the side surface of the first interconnect, the upper portion of the first interconnect and the side surface of the first plug.

摘要翻译： 半导体器件具有半导体衬底，由半导体衬底上形成的含铜金属制成的第一互连，形成在第一互连上并连接到第一互连的导电第一插塞，第一互连上的铜硅化物层 在除了形成第一插头的区域之外的区域中，在第一插头上方的Cu硅化物层和形成在从第一互连的侧表面到第一插头的侧表面的区域上的第一多孔MSQ膜，以及 覆盖第一互连的侧表面，第一互连的上部和第一插塞的侧表面。

公开(公告)号：US07674721B2

公开(公告)日：2010-03-09

申请号：US11797293

申请日：2007-05-02

申请人： Tatsuya Usami

发明人： Tatsuya Usami

IPC分类号： H01L21/316

CPC分类号： H01L21/76897 ,  H01L21/02134 ,  H01L21/02137 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02274 ,  H01L21/02282 ,  H01L21/3122 ,  H01L21/3124 ,  H01L21/76801 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76835 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： A method of forming a multi-layered insulation film includes forming a first insulation layer using a first feed gas, the first insulation layer including methyl silsesquioxane (MSQ), forming a second insulation layer using a second feed gas, the second insulation layer including a polysiloxane compound having an Si—H group such that the second insulation layer is in contact with a top of the first insulation layer, and forming a third insulation layer including an inorganic material such that the third insulation layer is in contact with a top of the second insulation layer.

摘要翻译： 形成多层绝缘膜的方法包括使用第一进料气体形成第一绝缘层，第一绝缘层包括甲基硅倍半氧烷（MSQ），使用第二进料气体形成第二绝缘层，第二绝缘层包括 具有Si-H基团的聚硅氧烷化合物，使得第二绝缘层与第一绝缘层的顶部接触，以及形成包含无机材料的第三绝缘层，使得第三绝缘层与第一绝缘层的顶部接触 第二绝缘层。

公开(公告)号：US07615498B2

公开(公告)日：2009-11-10

申请号：US11655261

申请日：2007-01-19

申请人： Yoichi Sasaki ,  Koichi Ohto ,  Noboru Morita ,  Tatsuya Usami ,  Hidenobu Miyamoto

发明人： Yoichi Sasaki ,  Koichi Ohto ,  Noboru Morita ,  Tatsuya Usami ,  Hidenobu Miyamoto

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L21/76835 ,  H01L21/76801 ,  H01L21/76807 ,  H01L21/76832

摘要： A semiconductor device 200 comprises a SiCN film 202 formed on a semiconductor substrate (not shown), a first SiOC film 204 formed thereon, a SiCN film 208 formed thereon, a second SiOC film 210 formed thereon, a SiO2 film 212 and a SiCN film 214 formed thereon. The first SiOC film 204 has a barrier metal layer 216 and via 218 formed therein, and the second SiOC film 210 has a barrier metal layer 220 and wiring metal layer 222 formed therein. Carbon content of the second SiOC film 210 is adjusted larger than that of the first SiOC film 204. This makes it possible to improve adhesiveness of the insulating interlayer with other insulating layers, while keeping a low dielectric constant of the insulating interlayer.

摘要翻译： 半导体器件200包括形成在半导体衬底（未示出）上的SiCN膜202，形成在其上的第一SiOC膜204，形成在其上的SiCN膜208，形成在其上的第二SiOC膜210，SiO 2膜212和SiCN膜 214。 第一SiOC膜204具有形成在其中的阻挡金属层216和通孔218，并且第二SiOC膜210具有形成在其中的阻挡金属层220和布线金属层222。 第二SiOC膜210的碳含量被调节为大于第一SiOC膜204的碳含量。这使得可以在保持绝缘夹层的低介电常数的同时，改善绝缘中间层与其它绝缘层的粘附性。

公开(公告)号：US20090137108A1

公开(公告)日：2009-05-28

申请号：US12320053

申请日：2009-01-15

申请人： Tatsuya Usami

发明人： Tatsuya Usami

IPC分类号： H01L21/4763 ,  H01L21/47

CPC分类号： H01L21/76897 ,  H01L21/02134 ,  H01L21/02137 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02274 ,  H01L21/02282 ,  H01L21/3122 ,  H01L21/3124 ,  H01L21/76801 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76835 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： A method of forming a multi-layered insulation film includes forming a first insulation layer using a first feed gas, the first insulation layer including methyl silsesquioxane (MSQ), forming a second insulation layer using a second feed gas, the second insulation layer including a polysiloxane compound having an Si—H group such that the second insulation layer is in contact with a top of the first insulation layer, and forming a third insulation layer including an inorganic material such that the third insulation layer is in contact with a top of the second insulation layer.

摘要翻译： 形成多层绝缘膜的方法包括使用第一进料气体形成第一绝缘层，第一绝缘层包括甲基硅倍半氧烷（MSQ），使用第二进料气体形成第二绝缘层，第二绝缘层包括 具有Si-H基团的聚硅氧烷化合物，使得第二绝缘层与第一绝缘层的顶部接触，以及形成包含无机材料的第三绝缘层，使得第三绝缘层与第一绝缘层的顶部接触 第二绝缘层。