公开(公告)号：US20110220854A1

公开(公告)日：2011-09-15

申请号：US13126625

申请日：2010-02-18

申请人： Yasuyuki Okimura ,  Shinji Ban ,  Hiroshi Watanabe ,  Takeshi Mitsuoka

发明人： Yasuyuki Okimura ,  Shinji Ban ,  Hiroshi Watanabe ,  Takeshi Mitsuoka

IPC分类号： H01B1/02

CPC分类号： H01B1/08 ,  C04B35/44 ,  C04B2235/3206 ,  C04B2235/3208 ,  C04B2235/3213 ,  C04B2235/3224 ,  C04B2235/3225 ,  C04B2235/3227 ,  C04B2235/3243 ,  C04B2235/3268 ,  C04B2235/3274 ,  C04B2235/656 ,  C04B2235/76 ,  C04B2235/768 ,  C04B2235/80 ,  H01C7/008 ,  H01C17/06533 ,  H01C17/06553

摘要： A sintered electroconductive oxide (1) forming a thermistor element (2) has a first crystal phase having a composition represented by RE14Al2O9 and a second crystal phase having a perovskite structure represented by (RE21-aSLa)MO3, and that the factor a of the second crystal phase satisfies the following condition: 0.18

摘要翻译： 形成热敏电阻元件（2）的烧结导电氧化物（1）具有由RE14Al2O9表示的组成的第一结晶相和由（RE21-aSLa）MO3表示的钙钛矿结构的第二结晶相， 第二晶相满足以下条件：0.18

公开(公告)号：US08771559B2

公开(公告)日：2014-07-08

申请号：US13210684

申请日：2011-08-16

申请人： Hiroshi Watanabe ,  Yasuyuki Okimura ,  Shinji Ban ,  Takeshi Mitsuoka

发明人： Hiroshi Watanabe ,  Yasuyuki Okimura ,  Shinji Ban ,  Takeshi Mitsuoka

IPC分类号： H01B1/02

CPC分类号： H01C7/008 ,  C04B35/016 ,  C04B35/44 ,  C04B35/6262 ,  C04B35/62645 ,  C04B35/62695 ,  C04B2235/3213 ,  C04B2235/3217 ,  C04B2235/3222 ,  C04B2235/3224 ,  C04B2235/3225 ,  C04B2235/3241 ,  C04B2235/3267 ,  C04B2235/5436 ,  C04B2235/5445 ,  C04B2235/604 ,  C04B2235/6567 ,  C04B2235/768 ,  C04B2235/80 ,  G01K7/223 ,  H01B1/08

摘要： A conductive sintered oxide which includes: a conductive crystal phase having a perovskite structure represented by (RE1-cSrc)MdO3, in which RE is a group of elements consisting of Yb and/or Lu and at least one element selected from Group IIIA elements excluding Yb, Lu and La, and M is a group of elements consisting of Al and at least one element selected from Groups IVA, VA, VIA, VIIA and VIII, a first insulating crystal phase represented by RE2O3, and a second insulating crystal phase represented by SrAl2O4. The conductive crystal phase has a coefficient c satisfying 0.18

摘要翻译： 一种导电烧结氧化物，其包括：具有由（RE1-cSrc）MdO3表示的钙钛矿结构的导电结晶相，其中RE是由Yb和/或Lu组成的元素组，以及选自IIIA族元素中的至少一种元素，不包括 Yb，Lu和La，M是由Al和选自IVA，VA，VIA，VIIA和VIII族中的至少一种元素组成的元素，由RE 2 O 3表示的第一绝缘晶相和表示为第二绝缘晶相 通过SrAl2O4。 导电晶相的系数c满足0.18

公开(公告)号：US08617433B2

公开(公告)日：2013-12-31

申请号：US13210430

申请日：2011-08-16

申请人： Hiroshi Watanabe ,  Yasayuki Okimura ,  Shinji Ban ,  Takeshi Mitsuoka

发明人： Hiroshi Watanabe ,  Yasayuki Okimura ,  Shinji Ban ,  Takeshi Mitsuoka

IPC分类号： H01B1/02

CPC分类号： H01C17/06533 ,  C04B35/44 ,  C04B2235/3206 ,  C04B2235/3208 ,  C04B2235/3213 ,  C04B2235/3222 ,  C04B2235/3224 ,  C04B2235/3225 ,  C04B2235/3267 ,  C04B2235/3272 ,  C04B2235/5436 ,  C04B2235/80 ,  G01K7/223 ,  H01C7/008 ,  H01C7/025 ,  H01C7/045

摘要： A conductive sintered oxide including: a first crystal phase represented by RE14Al2O9 and a second crystal phase having a perovskite structure represented by (RE21-cSLc)(AlxM1y)O3. RE1 is a first element group consisting of Yb and/or Lu and at least one element selected from Group IIIA elements excluding Yb, Lu and La. RE2 is a second element group consisting of at least one element selected from Group IIIA elements excluding La and including at least one of the elements constituting the first element group RE1. SL is an element group consisting of at least one of Sr, Ca and Mg and which includes Sr as a main element, and M1 is an element group consisting of at least one element selected from Groups IVA, VA, VIA, VIIA and VIII excluding Cr. The coefficient c is in the range of 0.18

摘要翻译： 一种导电烧结氧化物，包括：由RE14Al2O9表示的第一晶相和具有由（RE21-cSLc）（Al x M y y）O 3表示的钙钛矿结构的第二结晶相。 RE1是由Yb和/或Lu组成的第一元素组和选自除了Yb，Lu和La之外的IIIA族元素中的至少一种元素，RE2是由选自除La之外的IIIA族元素中的至少一种元素组成的第二元素基团， 包括构成第一元素组RE1的元素中的至少一个。 SL是由Sr，Ca和Mg中的至少一种组成的元素组，其包括Sr作为主要元素，M1是由选自IVA，VA，VIA，VIIA和VIII族中的至少一种元素组成的元素组，不包括 Cr。 系数c在0.18

公开(公告)号：US20190114273A1

公开(公告)日：2019-04-18

申请号：US16218600

申请日：2018-12-13

申请人： Hiroshi Watanabe

发明人： Hiroshi Watanabe

IPC分类号： G06F13/20 ,  G06F13/16 ,  H04L29/06 ,  H04L9/32 ,  H04L9/06 ,  H01L29/861 ,  H01L29/788 ,  H01L29/78 ,  H01L49/02 ,  H01L27/112 ,  H01L27/06 ,  H01L23/525 ,  H01L23/522 ,  H01L23/528 ,  G06F21/73 ,  G06F21/44 ,  G06F13/40

CPC分类号： G06F13/20 ,  G06F13/1673 ,  G06F13/4068 ,  G06F21/44 ,  G06F21/73 ,  H01L23/5226 ,  H01L23/5256 ,  H01L23/528 ,  H01L27/0629 ,  H01L27/11286 ,  H01L28/60 ,  H01L29/78 ,  H01L29/7883 ,  H01L29/861 ,  H04L9/0662 ,  H04L9/3278 ,  H04L63/083 ,  H04L63/0876

摘要： A method of using a chip identification device is jointly performed by a chip mass-produced by a semiconductor manufacturing process, a first chip manufacturer making the chip, and a chip user assembling a product by using the chip. The method includes inputting a first published passcode, published by the first chip manufacturer, inputting a second published passcode published by a second chip manufacturer, inputting the first published passcode to the chip by the chip user, reading an aggregate of electronic output signals as a read code, sending the read code to the first chip manufacturer to compare the first output code and the read code. The chip is regarded as a counterfeit if the comparison is consistent.

公开(公告)号：US09894095B2

公开(公告)日：2018-02-13

申请号：US15064693

申请日：2016-03-09

申请人： Hiroshi Watanabe

发明人： Hiroshi Watanabe

IPC分类号： H04L9/32 ,  H04L29/06 ,  G06F21/73 ,  G09C1/00 ,  G06F21/44 ,  G11C16/08 ,  G11C16/10 ,  G11C16/16 ,  G11C16/26 ,  G11C16/34 ,  H01L21/02 ,  H01L23/528

CPC分类号： H04L63/1441 ,  G06F21/44 ,  G06F21/73 ,  G06F2221/2129 ,  G09C1/00 ,  G11C16/08 ,  G11C16/10 ,  G11C16/16 ,  G11C16/26 ,  G11C16/34 ,  H01L21/02236 ,  H01L21/02255 ,  H01L23/528 ,  H04L9/3278 ,  H04L63/083 ,  H04L65/1073

摘要： A technology precluding attacks through peripheral devices thefts to a network of electronic appliance, by utilizing physical chip identification devices, is disclosed. The electronic appliance in the network are divided into the peripheral devices and stem servers managing registration information of the peripheral devices, wherein the stem servers serve as central control using software, and the peripheral devices are managed at device-level by having physical chip identification devices, thus the security of the whole network is efficiently reinforced.

公开(公告)号：US20180019925A1

公开(公告)日：2018-01-18

申请号：US15643672

申请日：2017-07-07

申请人： Hiroshi Watanabe

发明人： Hiroshi Watanabe ,  Te-Chang Tseng ,  Yukihiro Nagai ,  Riichiro Shirota

IPC分类号： H04L12/24 ,  H01L23/535 ,  H01L27/108 ,  H04L29/06

CPC分类号： H04L9/3278 ,  G06F7/588 ,  G06F21/44 ,  G06F21/602 ,  G06F21/70 ,  G06F21/73 ,  G06F21/86 ,  G11C7/24 ,  G11C11/1695 ,  G11C11/2295 ,  G11C13/0059 ,  G11C16/20 ,  G11C16/22 ,  G11C2029/4402 ,  G11C2213/79 ,  H01L23/535 ,  H01L27/10805 ,  H04L9/0861 ,  H04L9/0866 ,  H04L9/32 ,  H04L41/12 ,  H04L69/16 ,  H04L2209/12 ,  H04L2209/805

摘要： A network of electronic appliances includes a plurality of network units of electronic appliances. The network units include a first network unit and a plurality of second network units. The first network unit is connected to at least one of the second network units. Each of the network units includes a stem server and a plurality of peripheral devices connected to the stem server. The stem server includes at least one passcode and at least one list of a plurality of registration codes. Each list is associated to a respective passcode. Each registration code of one list associating to one passcode corresponds to a respective peripheral device. Each registration code is generated in response to a respective passcode using physical randomness of a respective peripheral device in correspondence to the passcode. An address of each identification cell is defined by several word lines and bit lines.

公开(公告)号：US20160277437A1

公开(公告)日：2016-09-22

申请号：US15064693

申请日：2016-03-09

申请人： Hiroshi Watanabe

发明人： Hiroshi Watanabe

IPC分类号： H04L29/06 ,  H01L21/02 ,  H01L23/528 ,  G11C16/34 ,  G11C16/08 ,  G11C16/26 ,  G11C16/10 ,  G06F21/44 ,  G11C16/16

CPC分类号： H04L63/1441 ,  G06F21/44 ,  G06F21/73 ,  G06F2221/2129 ,  G09C1/00 ,  G11C16/08 ,  G11C16/10 ,  G11C16/16 ,  G11C16/26 ,  G11C16/34 ,  H01L21/02236 ,  H01L21/02255 ,  H01L23/528 ,  H04L9/3278 ,  H04L63/083 ,  H04L65/1073

摘要： A technology precluding attacks through peripheral devices thefts to a network of electronic appliance, by utilizing physical chip identification devices, is disclosed. The electronic appliance in the network are divided into the peripheral devices and stem servers managing registration information of the peripheral devices, wherein the stem servers serve as central control using software, and the peripheral devices are managed at device-level by having physical chip identification devices, thus the security of the whole network is efficiently reinforced.

摘要翻译： 公开了一种通过利用物理芯片识别装置来防止外围设备窃取电子设备网络的技术的技术。 网络中的电子设备被分成管理外围设备的注册信息的外围设备和干服务器，其中，干服务器用作使用软件的中央控制，并且外围设备通过具有物理芯片识别设备 从而有效地加强了整个网络的安全性。

公开(公告)号：US20150001958A1

公开(公告)日：2015-01-01

申请号：US14377466

申请日：2012-02-09

申请人： Shigeru Abe ,  Yasuyoshi Kaneko ,  Hiroshi Watanabe ,  Tomio Yasuda

发明人： Shigeru Abe ,  Yasuyoshi Kaneko ,  Hiroshi Watanabe ,  Tomio Yasuda

IPC分类号： H02J5/00

CPC分类号： H02J50/12 ,  B60L15/007 ,  B60L50/16 ,  B60L53/12 ,  B60L53/22 ,  B60L53/34 ,  B60L53/36 ,  B60L2210/30 ,  B60L2210/40 ,  H02J7/022 ,  H02J7/025 ,  H02J50/10 ,  H02M3/33584 ,  H02M7/797 ,  Y02T10/645 ,  Y02T10/70 ,  Y02T10/7005 ,  Y02T10/7077 ,  Y02T10/7088 ,  Y02T10/7241 ,  Y02T10/92 ,  Y02T90/121 ,  Y02T90/122 ,  Y02T90/125 ,  Y02T90/127 ,  Y02T90/14

摘要： An example according to one embodiment includes a first coil and a second coil spaced apart therefrom. The system is supplied with power from a primary-side circuit to a secondary-side circuit and vice versa. The primary-side circuit includes the first coil. The secondary-side circuit includes the second coil. The primary-side circuit connects to a first converter that converts direct current into alternating current and vice versa. The first converter connects to second converter that converts direct current into alternating current and vice versa, and the second converter further connects to a commercial power supply. The secondary-side circuit connects to third converter that converts direct current into alternating current and vice versa, and the third converter further connects to direct current power supply of a moving body. Bidirectional power transfer is performed only by a switching operation of the first converter, the second converter, and the third converter.

摘要翻译： 根据一个实施例的示例包括第一线圈和与其间隔开的第二线圈。 该系统由初级侧电路供电到次级侧电路，反之亦然。 初级侧电路包括第一线圈。 次级侧电路包括第二线圈。 初级侧电路连接到将直流电转换为交流电的第一转换器，反之亦然。 第一转换器连接到将直流转换成交流电的第二转换器，反之亦然，并且第二转换器进一步连接到商用电源。 次级侧电路连接到将直流转换成交流电的第三转换器，反之亦然，第三转换器进一步连接到移动体的直流电源。 仅通过第一转换器，第二转换器和第三转换器的开关操作来执行双向功率传输。

公开(公告)号：US08611972B2

公开(公告)日：2013-12-17

申请号：US12838619

申请日：2010-07-19

申请人： Hirotake Sumi ,  Hiroshi Watanabe

发明人： Hirotake Sumi ,  Hiroshi Watanabe

IPC分类号： H04W88/02

CPC分类号： H01Q1/243 ,  H01Q1/48 ,  H01Q9/16 ,  H01Q9/42 ,  H04M1/0235

摘要： According to one embodiment, a mobile wireless apparatus includes: a first housing; and a second housing configured to be slidably connected to the first housing. The first housing includes: a conductor section; and a conducting member configured comprise a conductive material and to be connected to the conductor section. The second housing includes: a ground circuit; a power feed circuit; a slide member configured to comprise a conductive material, to be connected to the ground circuit, and to be slidably engaged with the first housing; and an unbalanced antenna configured to be connected to the power feed circuit. The conducting member is configured to make contact with the slide member when the first housing is opened with respect to the second housing.

摘要翻译： 根据一个实施例，移动无线设备包括：第一外壳; 以及构造成可滑动地连接到所述第一壳体的第二壳体。 第一壳体包括：导体部分; 并且导电构件构造成包括导电材料并连接到导体部分。 第二壳体包括：接地电路; 供电电路; 滑动构件，其构造成包括导电材料，以连接到接地电路，并且与第一壳体可滑动地接合; 以及被配置为连接到所述馈电电路的不平衡天线。 导电构件被构造成当第一壳体相对于第二壳体打开时与滑动构件接触。

公开(公告)号：US20130288467A1

公开(公告)日：2013-10-31

申请号：US13979564

申请日：2011-06-09

申请人： Yuji Ebiike ,  Takahiro Nakatani ,  Hiroshi Watanabe ,  Yoshio Fujii ,  Sunao Aya ,  Yoshiyuki Nakaki ,  Tsuyoshi Kawakami ,  Shuhei Nakata

发明人： Yuji Ebiike ,  Takahiro Nakatani ,  Hiroshi Watanabe ,  Yoshio Fujii ,  Sunao Aya ,  Yoshiyuki Nakaki ,  Tsuyoshi Kawakami ,  Shuhei Nakata

IPC分类号： H01L21/266

CPC分类号： H01L21/266 ,  H01L21/0465 ,  H01L23/544 ,  H01L29/0619 ,  H01L29/0661 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/66068 ,  H01L29/872 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device capable of suppressing generation of a high electric field and preventing a dielectric breakdown from occurring, and a method of manufacturing the same. The method of manufacturing a semiconductor device includes (a) preparing an n+ substrate to be a ground constituted by a silicon carbide semiconductor of a first conductivity type, (b) forming a recess structure surrounding an element region on the n+ substrate by using a resist pattern, and (c) forming a guard ring injection layer to be an impurity layer of a second conductivity type in a recess bottom surface and a recess side surface in the recess structure by impurity injection through the resist pattern, and a corner portion of the recess structure is covered with the impurity layer.

摘要翻译： 能够抑制高电场的产生和防止发生电介质击穿的半导体装置及其制造方法。 制造半导体器件的方法包括：（a）制备作为由第一导电类型的碳化硅半导体构成的接地的n +衬底，（b）通过使用抗蚀剂形成围绕n +衬底上的元件区域的凹陷结构 图案，以及（c）通过通过抗蚀剂图案的杂质注入，在凹陷结构的凹槽底表面和凹陷侧表面中形成作为第二导电类型的杂质层的保护环注入层，以及 凹陷结构被杂质层覆盖。