公开(公告)号：US08381829B2

公开(公告)日：2013-02-26

申请号：US12280948

申请日：2007-02-28

申请人： Hiroyuki Hanawa ,  Kiyoshi Kato ,  Kazuhiko Funabashi ,  Katsuhiro Oomori

发明人： Hiroyuki Hanawa ,  Kiyoshi Kato ,  Kazuhiko Funabashi ,  Katsuhiro Oomori

IPC分类号： E21B1/14

CPC分类号： H01M2/34 ,  H01M2/1055 ,  H01M2/204 ,  H01M10/052 ,  H01M10/4207 ,  H01M10/441 ,  H01M10/482 ,  H02J7/00 ,  H02J7/0031

摘要： A battery device is constituted by connecting such cell assemblies in parallel as each includes: a first cell group having a plurality of cells connected in series; a housing container for housing the first cell group; current detector housed in the container for detecting a current to flow through the first cell group; a switching element connected with the first cell group for turning ON/OFF the current to flow through the first cell group; and a controller for controlling the ON/OFF of the switching element in response to the output signal of the current detector.

摘要翻译： 电池装置是通过并联连接这样的电池组件构成的，每个电池组件包括：具有串联连接的多个电池的第一电池组; 用于容纳所述第一电池组的容纳容器; 电流检测器，容纳在容器中，用于检测电流流过第一电池组; 与第一单元组连接的开关元件，用于导通/关闭电流流过第一单元组; 以及控制器，用于响应于电流检测器的输出信号来控制开关元件的ON / OFF。

公开(公告)号：US20090071675A1

公开(公告)日：2009-03-19

申请号：US12280948

申请日：2007-02-28

申请人： Hiroyuki Hanawa ,  Kiyoshi Kato ,  Kazuhiko Funabashi ,  Katsuhiro Oomori

发明人： Hiroyuki Hanawa ,  Kiyoshi Kato ,  Kazuhiko Funabashi ,  Katsuhiro Oomori

IPC分类号： B23B45/02 ,  H01M2/00

CPC分类号： H01M2/34 ,  H01M2/1055 ,  H01M2/204 ,  H01M10/052 ,  H01M10/4207 ,  H01M10/441 ,  H01M10/482 ,  H02J7/00 ,  H02J7/0031

摘要： A battery device is constituting by connecting such cell assemblies in parallel as each comprises: a first cell group having a plurality of cells connected in series; a housing container for housing said first cell group; current detecting means housed in said container for detecting a current to flow through the first cell group; a switching element connected with said first cell group for turning ON/OFF the current to flow through said first cell group; and means for controlling the ON/OFF of said switching element in response to the output signal of said current detecting means.

摘要翻译： 通过并联连接这样的电池组件构成电池装置，每个电池组件包括：具有串联连接的多个电池的第一电池组; 用于容纳所述第一电池组的容纳容器; 电流检测装置，容纳在所述容器中，用于检测流过所述第一电池组的电流; 与所述第一单元组连接的开关元件，用于导通/关闭所述电流流过所述第一单元组; 以及用于响应于所述电流检测装置的输出信号控制所述开关元件的ON / OFF的装置。

公开(公告)号：US20160274965A1

公开(公告)日：2016-09-22

申请号：US15166485

申请日：2016-05-27

申请人： Kiyoshi Kato

发明人： Kiyoshi Kato

IPC分类号： G06F11/07

CPC分类号： G06F11/079 ,  G06F11/0709 ,  G06F11/0751 ,  G06F11/0787 ,  G06F11/3452 ,  G06Q10/02

摘要： In a system operations management apparatus, a burden to a system administrator when providing a decision criterion in detection of a failure in the future is reduced. The system operations management apparatus 1 includes a performance information accumulation unit 12, a model generation unit 30 and an analysis unit 31. The performance information accumulation unit 12 stores performance information including a plurality of types of performance values in a system in time series. The model generation unit 30 generates a correlation model including one or more correlations between the different types of performance values stored in the performance information accumulation unit 12 for each of a plurality of periods having one of a plurality of attributes. The analysis unit 31 performs abnormality detection of the performance information of the system which has been inputted by using the inputted performance information and the correlation model corresponding to the attribute of a period in which the inputted performance information has been acquired.

公开(公告)号：US09384079B2

公开(公告)日：2016-07-05

申请号：US14589255

申请日：2015-01-05

申请人： Kiyoshi Kato

发明人： Kiyoshi Kato

IPC分类号： G06F11/00 ,  G06F11/07 ,  G06Q10/02 ,  G06F11/34

CPC分类号： G06F11/079 ,  G06F11/0709 ,  G06F11/0751 ,  G06F11/0787 ,  G06F11/3452 ,  G06Q10/02

摘要： In a system operations management apparatus, a burden to a system administrator when providing a decision criterion in detection of a failure in the future is reduced. The system operations management apparatus 1 includes a performance information accumulation unit 12, a model generation unit 30 and an analysis unit 31. The performance information accumulation unit 12 stores performance information including a plurality of types of performance values in a system in time series. The model generation unit 30 generates a correlation model including one or more correlations between the different types of performance values stored in the performance information accumulation unit 12 for each of a plurality of periods having one of a plurality of attributes. The analysis unit 31 performs abnormality detection of the performance information of the system which has been inputted by using the inputted performance information and the correlation model corresponding to the attribute of a period in which the inputted performance information has been acquired.

公开(公告)号：US09188631B2

公开(公告)日：2015-11-17

申请号：US13446614

申请日：2012-04-13

申请人： Kiyoshi Kato ,  Konami Izumi ,  Masahiko Hayakawa ,  Koichiro Kamata

发明人： Kiyoshi Kato ,  Konami Izumi ,  Masahiko Hayakawa ,  Koichiro Kamata

IPC分类号： G01R31/02 ,  G01R31/28 ,  G01R31/302 ,  H01L27/13

CPC分类号： G01R31/2822 ,  G01R31/2886 ,  G01R31/3025 ,  H01L27/13

摘要： A substrate including a semiconductor layer, where characteristics of an element can be evaluated with high reliability, and an evaluating method thereof are provided. A substrate including a semiconductor layer of the invention has a closed-loop circuit in which an antenna coil and a semiconductor element are connected in series, and a surface of an area over which the circuit is formed is covered with an insulating film. By using such a circuit, a contactless inspection can be carried out. Further, a ring oscillator can be substituted for the closed-loop circuit.

摘要翻译： 提供了包括可以以高可靠性评估元件的特性的半导体层的基板及其评价方法。 包括本发明的半导体层的衬底具有一个闭环电路，其中天线线圈和半导体元件串联连接，并且形成有电路的区域的表面被绝缘膜覆盖。 通过使用这样的电路，可以进行非接触检查。 此外，环形振荡器可以代替闭环电路。

公开(公告)号：US08946710B2

公开(公告)日：2015-02-03

申请号：US13358554

申请日：2012-01-26

申请人： Kiyoshi Kato ,  Takeshi Osada

发明人： Kiyoshi Kato ,  Takeshi Osada

IPC分类号： H01L29/04 ,  H01L27/13 ,  H03K3/03 ,  H03K5/13 ,  H03K23/58 ,  H03L7/085 ,  H03L7/099 ,  H03L7/18 ,  H01L27/12 ,  H03K5/00

CPC分类号： H01L27/13 ,  H01L27/1214 ,  H01L27/1266 ,  H03K3/0315 ,  H03K5/133 ,  H03K23/582 ,  H03K2005/00039 ,  H03K2005/00202 ,  H03L7/085 ,  H03L7/0995 ,  H03L7/18

摘要： A semiconductor device with high function, multifunction and high added value. The semiconductor device includes a PLL circuit that is provided over a substrate and outputs a signal with a correct frequency. By providing such a PLL circuit over the substrate, a semiconductor device with high function, multifunction and high added value can be achieved.

摘要翻译： 具有功能高，功能多，附加值高的半导体器件。 半导体器件包括提供在衬底上并且输出具有正确频率的信号的PLL电路。 通过在衬底上设置这样的PLL电路，可以实现具有高功能，多功能和高附加值的半导体器件。

公开(公告)号：US08896046B2

公开(公告)日：2014-11-25

申请号：US13285450

申请日：2011-10-31

申请人： Kiyoshi Kato

发明人： Kiyoshi Kato

IPC分类号： H01L27/108 ,  H01L27/105 ,  H01L27/115 ,  H01L27/06 ,  H01L27/12

CPC分类号： H01L27/108 ,  H01L27/0688 ,  H01L27/105 ,  H01L27/11551 ,  H01L27/1156 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/7869

摘要： Provided is a semiconductor device with a novel structure in which stored data can be retained even when power is not supplied, and which does not have a limitation on the number of writing. The semiconductor device includes both a memory circuit including a transistor including an oxide semiconductor (in a broader sense, a transistor whose off-state current is sufficiently small), and a peripheral circuit such as a driver circuit including a transistor including a material other than an oxide semiconductor (that is, a transistor capable of operating at sufficiently high speed). Further, the peripheral circuit is provided in a lower portion and the memory circuit is provided in an upper portion, so that the area and size of the semiconductor device can be decreased.

摘要翻译： 提供一种具有新颖结构的半导体器件，其中即使在未提供电力的情况下也可以保留存储的数据，并且对写入次数没有限制。 半导体器件包括包括氧化物半导体（在更广泛的意义上是截止电流足够小的晶体管）的晶体管的存储器电路和包括晶体管的诸如驱动器电路的外围电路，该晶体管包括除了 氧化物半导体（即，能够以足够高的速度运行的晶体管）。 此外，外围电路设置在下部，并且存储电路设置在上部，使得可以减小半导体器件的面积和尺寸。

公开(公告)号：US08779433B2

公开(公告)日：2014-07-15

申请号：US13115239

申请日：2011-05-25

申请人： Atsuo Isobe ,  Yoshinori Ieda ,  Kiyoshi Kato ,  Yuto Yakubo ,  Yuki Hata

发明人： Atsuo Isobe ,  Yoshinori Ieda ,  Kiyoshi Kato ,  Yuto Yakubo ,  Yuki Hata

IPC分类号： H01L29/10 ,  H01L27/115 ,  H01L27/108

CPC分类号： H01L27/10852 ,  G11C16/0433 ,  H01L27/11521 ,  H01L27/1156 ,  H01L27/1225

摘要： It is an object to provide a semiconductor device with a novel structure in which stored data can be held even when power is not supplied and there is no limitation on the number of writings. A semiconductor device includes a second transistor and a capacitor provided over a first transistor. A source electrode of the second transistor which is in contact with a gate electrode of the first transistor is formed using a material having etching selectivity with respect to the gate electrode. By forming the source electrode of the second transistor using a material having etching selectivity with respect to the gate electrode of the first transistor, a margin in layout can be reduced, so that the degree of integration of the semiconductor device can be increased.

摘要翻译： 本发明的目的是提供一种具有新颖结构的半导体器件，其中即使在不提供电力的情况下也可以保持存储的数据，并且对写入数量没有限制。 半导体器件包括设置在第一晶体管上的第二晶体管和电容器。 使用具有相对于栅电极的蚀刻选择性的材料形成与第一晶体管的栅电极接触的第二晶体管的源电极。 通过使用相对于第一晶体管的栅电极具有蚀刻选择性的材料形成第二晶体管的源电极，可以减小布局的裕度，从而可以提高半导体器件的集成度。

公开(公告)号：US08642987B2

公开(公告)日：2014-02-04

申请号：US12578650

申请日：2009-10-14

申请人： Tamae Takano ,  Kiyoshi Kato ,  Hideaki Kuwabara

发明人： Tamae Takano ,  Kiyoshi Kato ,  Hideaki Kuwabara

IPC分类号： H01L45/00

CPC分类号： H01L27/12 ,  B82Y10/00 ,  G11C11/5664 ,  G11C13/0014 ,  H01L27/1214 ,  H01L27/1255 ,  H01L27/1266 ,  H01L27/13 ,  H01L51/0595

摘要： The invention provides a novel memory for which process technology is relatively simple and which can store multivalued information by a small number of elements. A part of a shape of the first electrode in the first storage element is made different from a shape of the first electrode in the second storage element, and thereby voltage values which change electric resistance between the first electrode and the second electrode are varied, so that one memory cell stores multivalued information over one bit. By partially processing the first electrode, storage capacity per unit area can be increased.

摘要翻译： 本发明提供了一种新颖的存储器，其工艺技术相对简单，并且可以通过少量元件存储多值信息。 使第一存储元件中的第一电极的形状的一部分与第二存储元件中的第一电极的形状不同，从而改变第一电极和第二电极之间改变电阻的电压值，因此 一个存储单元存储超过一位的多值信息。 通过部分地处理第一电极，可以增加每单位面积的存储容量。

公开(公告)号：US20130336620A1

公开(公告)日：2013-12-19

申请号：US14001340

申请日：2012-04-05

申请人： Hiroshi Tateishi ,  Yuji Nakura ,  Tomomi Sano ,  Kiyoshi Kato ,  Mitsuaki Nishie

发明人： Hiroshi Tateishi ,  Yuji Nakura ,  Tomomi Sano ,  Kiyoshi Kato ,  Mitsuaki Nishie

IPC分类号： G02B6/32

CPC分类号： G02B6/4224 ,  G02B6/32 ,  G02B6/4206 ,  G02B6/4221 ,  Y10T29/49124

摘要： A method of manufacturing an optical module includes the steps of applying the invisible light onto the resin member and the optical device, observing, with use of a camera, a part of the resin member located at the optical fiber coupling plane and an image formed at the optical fiber coupling plane by the optical device active layer while applying the invisible light onto the resin member and the optical device, aligning positions of the resin member and the circuit board with respect to each other while observing the part of the resin member located at the optical fiber coupling plane and the image formed at the optical fiber coupling plane, and fixing the resin member to the circuit board while maintaining the aligned positions of the resin member and the circuit board.

摘要翻译： 一种制造光学模块的方法包括以下步骤：将不可见光施加到树脂构件和光学装置上，使用照相机观察位于光纤耦合平面处的树脂构件的一部分和形成在 通过光学器件有源层将光纤耦合平面，同时将不可见光施加到树脂构件和光学装置上，同时观察树脂构件和电路板相对于彼此的位置，同时观察位于 光纤耦合平面和形成在光纤耦合平面上的图像，并且在保持树脂构件和电路板的对准位置的同时将树脂构件固定到电路板。