摘要:
A differential amplifier suitably adapted to an ultra-high-speed signal transmitting apparatus. The differential amplifier includes a first inductor located between a differential transistor and a gate grounded transistor, an optional second inductor located between a load resistor and a power supply, and an optional third inductor located between a source follower transistor and an output terminal.
摘要:
A differential amplifier suitably adapted to an ultra-high-speed signal transmitting apparatus. The differential amplifier includes a first inductor located between a differential transistor and a gate grounded transistor, an optional second inductor located between a load resistor and a power supply, and an optional third inductor located between a source follower transistor and an output terminal.
摘要:
Using a switching signal from a coarse/fine switching and operation mode switching circuit, the width of change of a counter control value during power up is increased, and the width of change is reduced once a steady state is reached. In the steady state, the frequency of updating is limited by a control signal from an update permit control circuit. In the steady state, the frequency band of a current source in an LD driving circuit is reduced in width.
摘要:
A semiconductor light source for an optical transmitter which includes at least one DC supply unit and at least one AC supply unit, comprises a DC signal source connected to the DC supply unit in order to supply a drive signal thereto; and an AC signal source connected to the AC supply unit in order to supply a control signal thereto; wherein turning on or off an optical output by the semiconductor light source is controlled by using a control signal having the same electric polarity as the drive signal.
摘要:
A design support apparatus includes: a circuit-data generation unit to generate circuit data based on layout information of a semiconductor integrated circuit; and a parameter determination unit to set a first parameter relating to mechanical stress exerted on a transistor including at least one of a plurality of gates in a diffusion region, wherein the circuit-data generation unit obtains a mobility of the transistor based on the first parameter and reflects the mobility in the circuit data.
摘要:
Using a switching signal from a coarse/fine switching and operation mode switching circuit, the width of change of a counter control value during power up is increased, and the width of change is reduced once a steady state is reached. In the steady state, the frequency of updating is limited by a control signal from an update permit control circuit. In the steady state, the frequency band of a current source in an LD driving circuit is reduced in width.
摘要:
An optical processing device for converting a wavelength of an optical signal comprises an optical processing unit supplied with an input optical beam carrying thereon one or more optical signals with respective wavelengths that are different from each other, the optical processing means being further supplied with a control optical beam having a stabilized reference wavelength and selecting the optical signal that has a first wavelength and outputting the same with a second wavelength that is specified by the reference wavelength; and a control unit for controlling the optical processing unit by specifying the first wavelength of the optical beam to be selected.
摘要:
In a data decision circuit: a clock generation unit generates a clock signal based on a phase difference signal so that the clock signal has an optimum phase with respect to a phase of an input data signal; a data determination unit determines data values carried by the input data signal, by using the clock signal; a phase-difference detection unit detects a rising-side phase difference and a falling-side phase difference, where the rising-side phase difference is a phase difference between a rising of the input data signal and a next transition in the clock signal, and the falling-side phase difference is a phase difference between the transition and a next falling of the input data signal; and a phase-difference-signal generation unit generates the phase difference signal so as to represent a difference between the rising-side phase difference and the falling-side phase difference.
摘要:
A device for identifying input data by using a first clock signal includes a first identifying unit which identifies the input data by using the first clock signal to generate first identified data and generates a first phase-relation determination result by determining whether a phase relation between the input data and the first clock signal is appropriate, a delay unit for delaying the input data by a predetermined phase amount to generate delayed input data, a second identifying unit which identifies the delayed input data by using the first clock signal to generate second identified data and generates a second phase-relation determination result by determining whether a phase relation between the delayed input data and the first clock signal is appropriate, and a selection unit which selects one of the first identified data and the second identified data based on at least one of the first phase-relation determination result and the second phase-relation determination result.
摘要:
Using a switching signal from a coarse/fine switching and operation mode switching circuit, the width of change of a counter control value during power up is increased, and the width of change is reduced once a steady state is reached. In the steady state, the frequency of updating is limited by a control signal from an update permit control circuit. In the steady state, the frequency band of a current source in an LD driving circuit is reduced in width.