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公开(公告)号:US20110018128A1
公开(公告)日:2011-01-27
申请号:US12757440
申请日:2010-04-09
申请人: Hsiu-Ping WEI , Shin-Puu JENG , Hao-Yi TSAI , Hsien-Wei CHEN , Yu-Wen LIU , Ying-Ju CHEN , Tzuan-Horng LIU
发明人: Hsiu-Ping WEI , Shin-Puu JENG , Hao-Yi TSAI , Hsien-Wei CHEN , Yu-Wen LIU , Ying-Ju CHEN , Tzuan-Horng LIU
IPC分类号: H01L23/498 , H01L21/3205
CPC分类号: H01L21/76801 , H01L23/3192 , H01L23/522 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L2224/02166 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/03464 , H01L2224/0401 , H01L2224/04042 , H01L2224/05008 , H01L2224/05022 , H01L2224/05096 , H01L2224/05124 , H01L2224/05147 , H01L2224/05572 , H01L2224/05624 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05671 , H01L2224/1145 , H01L2224/11452 , H01L2224/11462 , H01L2224/11464 , H01L2224/13116 , H01L2224/13147 , H01L2224/16 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01024 , H01L2924/01029 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/00014 , H01L2224/05552 , H01L2924/00
摘要: A semiconductor package structure is provided. The structure includes a semiconductor chip having a plurality of interconnect layers formed thereover. A first passivation layer is formed over the plurality of interconnect layers. A stress buffer layer is formed over the first passivation layer. A bonding pad is formed over the stress buffer layer. A second passivation layer is formed over a portion of the bonding pad, the second passivation having at least one opening therein exposing a portion of the bonding pad.
摘要翻译: 提供半导体封装结构。 该结构包括其上形成有多个互连层的半导体芯片。 在多个互连层上形成第一钝化层。 在第一钝化层上形成应力缓冲层。 在应力缓冲层上形成接合焊盘。 在接合焊盘的一部分上形成第二钝化层,第二钝化层具有至少一个开口,露出焊接区的一部分。
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公开(公告)号:US20120261662A1
公开(公告)日:2012-10-18
申请号:US13085745
申请日:2011-04-13
申请人: Shih-Wei LIANG , Yu-Wen LIU , Hsien-Wei CHEN
发明人: Shih-Wei LIANG , Yu-Wen LIU , Hsien-Wei CHEN
IPC分类号: H01L23/498 , H01L21/768
CPC分类号: H01L25/0657 , H01L22/34 , H01L23/522 , H01L24/14 , H01L2224/0401 , H01L2224/05022 , H01L2224/05096 , H01L2224/05572 , H01L2224/14131 , H01L2224/14179 , H01L2224/14515 , H01L2224/16145 , H01L2225/06513 , H01L2225/06596 , H01L2924/00014 , H01L2224/05552
摘要: An integrated circuit system comprising a first integrated and at least one of a second integrated circuit, interposer or printed circuit board. The first integrated circuit further comprising a wiring stack, bond pads electrically connected to the wiring stack, and bump balls formed on the bond pads. First portions of the wiring stack and the bond pads form a functional circuit, and second portions of the wiring stack and the bond pads form a test circuit. A portion of the bump balls comprising dummy bump balls. The dummy bump balls electrically connected to the second portions of the wiring stack and the bond pads. The at least one of the second integrated circuit, interposer orprinted circuit board forming a portion of the test circuit.
摘要翻译: 一种集成电路系统,包括第一集成电路和第二集成电路,插入器或印刷电路板中的至少一个。 第一集成电路还包括布线堆叠,电连接到布线堆叠的接合焊盘以及形成在接合焊盘上的凸块球。 布线堆叠和接合焊盘的第一部分形成功能电路,并且布线堆叠和接合焊盘的第二部分形成测试电路。 凸块球的一部分包括虚拟凸块球。 虚拟凸块球电连接到布线堆叠的第二部分和接合垫。 形成测试电路的一部分的第二集成电路,插入器或印刷电路板中的至少一个。
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公开(公告)号:US20120175728A1
公开(公告)日:2012-07-12
申请号:US13004261
申请日:2011-01-11
申请人: Ching-Jung YANG , Yu-Wen LIU , Michael Shou-Ming TONG , Hsien-Wei CHEN , Chung-Ying YANG , Tsung-Yuan YU
发明人: Ching-Jung YANG , Yu-Wen LIU , Michael Shou-Ming TONG , Hsien-Wei CHEN , Chung-Ying YANG , Tsung-Yuan YU
CPC分类号: H01L23/564 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor device includes a substrate having a circuit region and a seal ring region. The seal ring region surrounds the circuit region. A seal ring structure is disposed over the seal ring region. The seal ring structure has a first portion and a second portion above the first portion. The first portion has a width W1, and the second portion has a width W2. The width W1 is less than the width W2.
摘要翻译: 半导体器件包括具有电路区域和密封环区域的衬底。 密封圈区域围绕电路区域。 密封环结构设置在密封环区域的上方。 密封环结构具有在第一部分上方的第一部分和第二部分。 第一部分具有宽度W1,第二部分具有宽度W2。 宽度W1小于宽度W2。
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