公开(公告)号：US20090087953A1

公开(公告)日：2009-04-02

申请号：US12153451

申请日：2008-05-19

申请人： Hung-Tsun Lin

发明人： Hung-Tsun Lin

IPC分类号： H01L21/50

CPC分类号： H01L23/3107 ,  H01L21/4828 ,  H01L23/4951 ,  H01L23/49513 ,  H01L23/49534 ,  H01L23/49541 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/49 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/85207 ,  H01L2224/92 ,  H01L2224/92147 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  Y10S438/94 ,  Y10S438/959 ,  H01L2224/05599 ,  H01L2924/00 ,  H01L2924/00012

摘要： A manufacturing process of a leadframe-based BGA package is disclosed. A leadless leadframe with an upper layer and a lower layer is provided for the package. The upper layer includes a plurality of ball pads, and the lower layer includes a plurality of sacrificial pads aligning and connecting with the ball pads. A plurality of leads are formed in either the upper layer or the lower layer to interconnect the ball pads or the sacrificial pads. An encapsulant is formed to embed the ball pads after chip attachment and electrical connections. During manufacturing process, a half-etching process is performed after encapsulation to remove the sacrificial pads to make the ball pads electrically isolated and exposed from the encapsulant for solder ball placement where the soldering areas of the ball pads are defined without the need of solder mask(s) to solve the problem of solder bleeding of the solder balls on the leads or the undesired spots during reflow. Moreover, mold flash can easily be detected and removed.

摘要翻译： 公开了一种基于引线框架的BGA封装的制造工艺。 为封装提供了具有上层和下层的无引线框架。 上层包括多个球垫，下层包括与球垫对准并连接的多个牺牲垫。 在上层或下层中形成多个引线以互连球垫或牺牲垫。 形成密封剂以在芯片附接和电连接之后嵌入球垫。 在制造过程中，在封装之后执行半蚀刻工艺以去除牺牲焊盘，以使球垫与密封剂电隔离并暴露于焊球放置处，其中限定了焊盘的焊接区域，而不需要焊接掩模 以解决在回流期间引线上的焊球渗漏或不期望的斑点的问题。 此外，可以容易地检测和去除模具闪光。

公开(公告)号：US07952198B2

公开(公告)日：2011-05-31

申请号：US12153176

申请日：2008-05-14

申请人： Hung-Tsun Lin

发明人： Hung-Tsun Lin

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L23/40

CPC分类号： H01L23/3114 ,  H01L23/4951 ,  H01L23/49575 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L2224/83194 ,  H01L2224/83856 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A BGA package primarily includes a leadless leadframe with a plurality of leads, a chip disposed on the leads, a die-attaching layer adhering to an active surface of the chip and the top surfaces of the leads, a plurality of bonding wires electrically connecting the chip to the leads, an encapsulant, and a plurality of solder balls. Each lead has a bottom surface including a wire-bonding area and a ball-placement area, moreover, a plurality of lips project from the bottom surfaces of the leads around the ball-placement areas. The encapsulant encapsulates the chip, the bonding wires, the die-attaching layer, and the top surfaces, the bottom surfaces except the ball-placement areas. The solder balls are disposed on the ball-placement areas.

摘要翻译： BGA封装主要包括具有多个引线的无引线引线框架，设置在引线上的芯片，附着在芯片的有源表面上的管芯附着层和引线的顶表面，多个接合线电连接 芯片到引线，密封剂和多个焊球。 每个引线具有包括引线接合区域和球放置区域的底表面，此外，多个唇缘从引线周围的球放置区域突出。 密封剂封装芯片，接合线，管芯附着层和顶表面，除了球形放置区域之外的底面。 焊球设置在球放置区域上。

公开(公告)号：US07662672B2

公开(公告)日：2010-02-16

申请号：US12153451

申请日：2008-05-19

申请人： Hung-Tsun Lin

发明人： Hung-Tsun Lin

IPC分类号： H01L21/00

CPC分类号： H01L23/3107 ,  H01L21/4828 ,  H01L23/4951 ,  H01L23/49513 ,  H01L23/49534 ,  H01L23/49541 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/49 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/85207 ,  H01L2224/92 ,  H01L2224/92147 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  Y10S438/94 ,  Y10S438/959 ,  H01L2224/05599 ,  H01L2924/00 ,  H01L2924/00012

摘要： A manufacturing process of a leadframe-based BGA package is disclosed. A leadless leadframe with an upper layer and a lower layer is provided for the package. The upper layer includes a plurality of ball pads, and the lower layer includes a plurality of sacrificial pads aligning and connecting with the ball pads. A plurality of leads are formed in either the upper layer or the lower layer to interconnect the ball pads or the sacrificial pads. An encapsulant is formed to embed the ball pads after chip attachment and electrical connections. During manufacturing process, a half-etching process is performed after encapsulation to remove the sacrificial pads to make the ball pads electrically isolated and exposed from the encapsulant for solder ball placement where the soldering areas of the ball pads are defined without the need of solder mask(s) to solve the problem of solder bleeding of the solder balls on the leads or the undesired spots during reflow. Moreover, mold flash can easily be detected and removed.

摘要翻译： 公开了一种基于引线框架的BGA封装的制造工艺。 为封装提供了具有上层和下层的无引线框架。 上层包括多个球垫，下层包括与球垫对准并连接的多个牺牲垫。 在上层或下层中形成多个引线以互连球垫或牺牲垫。 形成密封剂以在芯片附接和电连接之后嵌入球垫。 在制造过程中，在封装之后执行半蚀刻工艺以去除牺牲焊盘，以使球垫与密封剂电隔离并暴露于焊球放置处，其中限定了焊盘的焊接区域，而不需要焊接掩模 以解决在回流期间引线上的焊球渗漏或不期望的斑点的问题。 此外，可以容易地检测和去除模具闪光。

公开(公告)号：US07781898B2

公开(公告)日：2010-08-24

申请号：US11806023

申请日：2007-05-29

申请人： Hung-Tsun Lin ,  Wu-Chang Tu ,  Cheng-Ting Wu

发明人： Hung-Tsun Lin ,  Wu-Chang Tu ,  Cheng-Ting Wu

IPC分类号： H01L23/48

CPC分类号： H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/585 ,  H01L24/28 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/05553 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/484 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/83138 ,  H01L2224/83856 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19103 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： An IC package primarily comprises a substrate, a die-attaching layer, a chip, at least a bonding wire, and a plurality of electrical connecting components. The substrate has a top surface and a bottom surface where the top surface includes a die-attaching area for disposing the die-attaching layer. The chip is attached to the die-attaching area by the die-attaching layer and is electrically connected to the substrate by the electrical connecting components. Both ends of the bonding wire are bonded to two interconnecting fingers on the top surface of the substrate where at least a portion of the bonding wire is encapsulated in the die-attaching layer to replace some wirings or vias inside a conventional substrate. Therefore, the substrate has simple and reduced wiring layers, i.e., to reduce the substrate cost. A chip carrier of the corresponding IC package is also revealed.

摘要翻译： IC封装主要包括基板，管芯安装层，芯片，至少一个接合线和多个电连接部件。 基板具有顶表面和底表面，其中顶表面包括用于设置管芯附接层的管芯附着区域。 芯片通过管芯附着层附接到管芯附着区域，并通过电连接部件与衬底电连接。 接合线的两端接合到基板的顶表面上的两个互连指状物，其中至少一部分接合线被封装在管芯附着层中以替代传统衬底内部的一些布线或通孔。 因此，衬底具有简单且降低的布线层，即降低衬底成本。 也显示了相应IC封装的芯片载体。

公开(公告)号：US20100200972A1

公开(公告)日：2010-08-12

申请号：US12153176

申请日：2008-05-14

申请人： Hung-Tsun Lin

发明人： Hung-Tsun Lin

IPC分类号： H01L23/495 ,  H01L23/498

CPC分类号： H01L23/3114 ,  H01L23/4951 ,  H01L23/49575 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L2224/83194 ,  H01L2224/83856 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A BGA package primarily includes a leadless leadframe with a plurality of leads, a chip disposed on the leads, a die-attaching layer adhering to an active surface of the chip and the top surfaces of the leads, a plurality of bonding wires electrically connecting the chip to the leads, an encapsulant, and a plurality of solder balls. Each lead has a bottom surface including a wire-bonding area and a ball-placement area, moreover, a plurality of lips project from the bottom surfaces of the leads around the ball-placement areas. The encapsulant encapsulates the chip, the bonding wires, the die-attaching layer, and the top surfaces, the bottom surfaces except the ball-placement areas, and the laterals of the leads between the top surfaces and the bottom surfaces. A plurality of cavities are formed in the bottom of the encapsulant to expose the corresponding and embedded ball-placement areas. The lips have a plurality of internal sides exposed inside the cavities. The solder balls are disposed on the ball-placement areas and on the internal sides of the cavities to make the solder balls partially embedded in the corresponding cavities to offer non-planar ball pads. It is effective to resolve the solderability of the solder balls and to enhance the reliability of wire bonding and the stability of solder ball placement.

摘要翻译： BGA封装主要包括具有多个引线的无引线引线框架，设置在引线上的芯片，附着在芯片的有源表面上的管芯附着层和引线的顶表面，多个接合线电连接 芯片到引线，密封剂和多个焊球。 每个引线具有包括引线接合区域和球放置区域的底表面，此外，多个唇缘从引线周围的球放置区域突出。 密封剂封装芯片，接合线，管芯附着层和顶表面，除了球形放置区域之外的底表面以及顶表面和底表面之间的引线的侧面。 在密封剂的底部形成多个空腔以露出相应和嵌入的球放置区域。 唇部具有暴露在空腔内的多个内侧。 焊球设置在球放置区域和空腔的内侧上，以使焊球部分地嵌入相应的空腔中，以提供非平面的球垫。 解决焊球的可焊性和提高引线接合的可靠性以及焊球放置的稳定性是有效的。

公开(公告)号：US07879653B2

公开(公告)日：2011-02-01

申请号：US12189165

申请日：2008-08-10

申请人： Hung-Tsun Lin

发明人： Hung-Tsun Lin

IPC分类号： H01L21/60

CPC分类号： H01L21/561 ,  H01L21/4828 ,  H01L23/3107 ,  H01L23/49582 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/81 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/10165 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49433 ,  H01L2224/73265 ,  H01L2224/81136 ,  H01L2224/8114 ,  H01L2224/81801 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A leadless semiconductor package with an electroplated layer embedded in an encapsulant and its manufacturing processes are disclosed. The package primarily includes a half-etched leadframe, a chip, an encapsulant, and an electroplated layer. The half-etched leadframe has a plurality of leads and a plurality of outer pads integrally connected to the leads. The encapsulant encapsulates the chip and the leads and has a plurality of cavities reaching to the outer pads to form an electroplated layer on the outer pads and embedded in the cavities. Accordingly, under the advantages of lower cost and higher thermal dissipation, the conventional substrates and their solder masks for BGA (Ball Grid Array) or LGA (Land Grid Array) packages can be replaced. The leads encapsulated in the encapsulant have a better bonding strength and the electroplated layer embedded in the encapsulant will not be damaged during shipping, handling, or storing the semiconductor packages. Furthermore, the manufacturing processes include two half-etching steps to form the half-etched leadframe where a second half-etching step is performed after forming the encapsulant and before forming the electroplated layer.

摘要翻译： 公开了一种具有嵌入密封剂中的电镀层的无引线半导体封装及其制造工艺。 封装主要包括半蚀刻引线框架，芯片，密封剂和电镀层。 半蚀刻引线框架具有多个引线和与引线整体连接的多个外焊盘。 密封剂封装芯片和引线，并且具有到达外部焊盘的多个空腔，以在外部焊盘上形成电镀层并嵌入空腔中。 因此，在降低成本和较高散热的优点下，可以更换常规基板及其用于BGA（球栅阵列）或LGA（Land Grid Array）封装的焊接掩模。 封装在密封剂中的引线具有更好的接合强度，并且嵌入密封剂中的电镀层在运输，处理或存储半导体封装期间不会被损坏。 此外，制造工艺包括形成半蚀刻引线框架的两个半蚀刻步骤，其中在形成密封剂之后和形成电镀层之前执行第二半蚀刻步骤。

公开(公告)号：US07579676B2

公开(公告)日：2009-08-25

申请号：US11580310

申请日：2006-10-13

申请人： Hung-Tsun Lin

发明人： Hung-Tsun Lin

IPC分类号： H01L23/495

CPC分类号： H01L23/3107 ,  H01L21/4828 ,  H01L23/4951 ,  H01L23/49513 ,  H01L23/49541 ,  H01L24/48 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A leadless leadframe has a plurality of bottom leads and a plurality of top soldering pads formed in different layers. After encapsulation and before solder ball placement, a half-etching process is performed to remove the bottom leads to make the top soldering pads electrically isolated, exposed and embedded in the encapsulant for solder ball placement where the soldering area of the top soldering pads is defined without the need of solder mask(s) to solve the diffusion of solder balls on the leads during reflow.

摘要翻译： 无引线框架具有多个底部引线和形成在不同层中的多个顶部焊盘。 在封装之后和焊球放置之前，进行半蚀刻工艺以去除底部引线，使顶部焊盘电隔离，暴露并嵌入密封剂中用于焊球放置，其中顶部焊盘的焊接区域被定义 而不需要焊接掩模来解决在回流期间焊球在引线上的扩散。

公开(公告)号：US20080174031A1

公开(公告)日：2008-07-24

申请号：US11806023

申请日：2007-05-29

申请人： Hung-Tsun Lin ,  Wu-Chang Tu ,  Cheng-Ting Wu

发明人： Hung-Tsun Lin ,  Wu-Chang Tu ,  Cheng-Ting Wu

IPC分类号： H01L23/48

CPC分类号： H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/585 ,  H01L24/28 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/05553 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/484 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/83138 ,  H01L2224/83856 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19103 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： An IC package primarily comprises a substrate, a die-attaching layer, a chip, at least a bonding wire, and a plurality of electrical connecting components. The substrate has a top surface and a bottom surface where the top surface includes a die-attaching area for disposing the die-attaching layer. The chip is attached to the die-attaching area by the die-attaching layer and is electrically connected to the substrate by the electrical connecting components. Both ends of the bonding wire are bonded to two interconnecting fingers on the top surface of the substrate where at least a portion of the bonding wire is encapsulated in the die-attaching layer to replace some wirings or vias inside a conventional substrate. Therefore, the substrate has simple and reduced wiring layers, i.e., to reduce the substrate cost. A chip carrier of the corresponding IC package is also revealed.

摘要翻译： IC封装主要包括基板，管芯安装层，芯片，至少一个接合线和多个电连接部件。 基板具有顶表面和底表面，其中顶表面包括用于设置管芯附接层的管芯附着区域。 芯片通过管芯附着层附接到管芯附着区域，并通过电连接部件与衬底电连接。 接合线的两端接合到基板的顶表面上的两个互连指状物，其中至少一部分接合线被封装在管芯附着层中以替代传统衬底内部的一些布线或通孔。 因此，衬底具有简单且降低的布线层，即降低衬底成本。 也显示了相应IC封装的芯片载体。

公开(公告)号：US20080042277A1

公开(公告)日：2008-02-21

申请号：US11543053

申请日：2006-10-05

申请人： Hung-Tsun Lin

发明人： Hung-Tsun Lin

IPC分类号： H01L23/48

CPC分类号： H01L23/3114 ,  H01L23/4951 ,  H01L24/48 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/83194 ,  H01L2224/83856 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A BGA package primarily includes a plurality of leads from a leadless lead frame, a chip, and a die-attaching layer. The chip is electrically connected to the leads by a plurality of bonding wires. Solder balls are disposed at the ball placing regions of the leads. Encapsulant encapsulates the chip, the die-attaching layer, and the top surfaces, the bottom surfaces, and the sides of the leads so that the ball placing regions are embedded inside the encapsulant. A plurality of cavities are formed in the encapsulant to expose the corresponding ball placing regions to resolve the solderability of the solder balls and to enhance the stability and reliability of wire bonding and solder ball placing. In one embodiment, a die-attaching layer between the chip and the leads is patterned for elastically supporting the solder balls and for wire bonding.

摘要翻译： BGA封装主要包括来自无引线框架，芯片和管芯附着层的多个引线。 芯片通过多根接合线与导线电连接。 焊球设置在引线的球放置区域。 封装剂封装芯片，芯片附着层以及引线的顶表面，底表面和侧面，使得球放置区域嵌入密封剂内。 在密封剂中形成多个空腔以暴露相应的球形放置区域以解决焊球的可焊性，并提高引线接合和焊球放置的稳定性和可靠性。 在一个实施例中，芯片和引线之间的管芯安装层被图案化以弹性地支撑焊球和引线接合。

公开(公告)号：US20090189296A1

公开(公告)日：2009-07-30

申请号：US12275172

申请日：2008-11-20

申请人： Cheng-Ting Wu ,  Hung-Tsun Lin ,  Yu-Ren Chen ,  Chun-Ying Lin

发明人： Cheng-Ting Wu ,  Hung-Tsun Lin ,  Yu-Ren Chen ,  Chun-Ying Lin

IPC分类号： H01L23/52 ,  H01L21/00

CPC分类号： H01L23/3114 ,  H01L23/49517 ,  H01L23/49822 ,  H01L23/49861 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/181 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A manufacturing method for a Flip Chip Quad Flat Non-leaded package structure is provided. A lead frame having a plurality of leads is provided at first in the manufacturing method. A dielectric layer is formed on the lead frame and exposes a top surface and a bottom surface of the leads. A redistribution layer including a plurality of pads and a plurality of conductive lines connected the pads and the top surface of the leads is formed on the dielectric layer. A solder resist layer is formed to cover the redistribution layer, the dielectric layer and the leads, and expose the surface of the pads. An adhesive layer is formed on the solder resist layer. A chip having a plurality of bumps is provided. The chip is adhered on the solder resist layer with the adhesive layer and each bump is electrically connected with one of the pads.

摘要翻译： 提供了一种倒装芯片四边形扁平无铅封装结构的制造方法。 首先在制造方法中设置具有多根引线的引线框架。 在引线框架上形成介电层，并使引线的顶表面和底表面露出。 在电介质层上形成包括多个焊盘的重分配层和连接焊盘和引线顶表面的多条导线。 形成阻焊层以覆盖再分布层，电介质层和引线，并露出焊盘的表面。 在阻焊层上形成粘接层。 提供具有多个凸块的芯片。 该芯片用粘合剂层粘附在阻焊层上，并且每个凸块与其中一个焊盘电连接。