公开(公告)号：US20160100484A1

公开(公告)日：2016-04-07

申请号：US14874606

申请日：2015-10-05

Applicant: IBIDEN CO., LTD.

Inventor： Masatoshi KUNIEDA ,  Katsuhiko TANNO

IPC: H05K1/11 ,  H05K3/40 ,  H05K1/09

CPC classification number: H05K3/4007 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5385 ,  H01L24/00 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/15313 ,  H05K2201/0367 ,  H05K2201/09563 ,  H05K2203/043 ,  H01L2224/45099

Abstract: A printed wiring board includes a base insulating layer including an insulating material, a conductor layer formed on the base insulating layer and including conductor pads, a coating insulating layer formed on the base insulating layer such that the coating insulating layer is covering the conductor layer and having opening portions exposing the conductor pads, respectively, and bumps formed on the conductor pads respectively such that each of the bumps includes an electroless plating metal layer formed on a respective one of the conductor pads and a solder layer formed on the electroless plating metal layer, the electroless plating metal layer having an upper end surface formed such that a central portion of the upper end surface is recessed relative to a peripheral portion of the upper end surface.

Abstract translation: 印刷电路板包括：绝缘层，包括绝缘材料的基底绝缘层，形成在基底绝缘层上的导体层，并且包括导体焊盘;涂覆绝缘层，形成在基底绝缘层上，使得覆盖绝缘层覆盖导体层; 具有分别暴露导体焊盘的开口部分和形成在导体焊盘上的凸起，使得每个凸起包括形成在相应的一个导体焊盘上的无电电镀金属层和形成在化学镀金属层上的焊料层 所述无电镀金属层的上端面形成为使得所述上端面的中央部相对于所述上端面的周边部凹陷。

公开(公告)号：US20210092841A1

公开(公告)日：2021-03-25

申请号：US17030947

申请日：2020-09-24

Applicant: IBIDEN CO., LTD.

Inventor： Akinori YOSHIDA ,  Katsuhiko TANNO

IPC: H05K1/11 ,  H05K3/40 ,  H05K3/46 ,  H05K3/34

Abstract: A printed wiring board includes a base insulating layer, a conductor layer formed on the base insulating layer and including conductor pads, an underlayer formed on one of the conductor pads of the conductor layer and including a metal different from a metal of the conductor layer, a solder resist layer formed on the base insulating layer such that the solder resist layer is covering the conductor layer and has openings exposing the conductor pads, respectively, and a bump formed directly on a first conductor pad of the conductor pads and including a base plating layer formed in a first opening of the openings and a top plating layer formed on the base plating layer such that a metal of the base plating layer is same as the metal of the conductor layer.

公开(公告)号：US20230164925A1

公开(公告)日：2023-05-25

申请号：US17456417

申请日：2021-11-24

Applicant: IBIDEN CO., LTD.

Inventor： Katsuhiko TANNO ,  Akifumi SHIKANO ,  Satoru KAWAI

IPC: H05K3/42 ,  H05K3/06 ,  C23C28/00 ,  C23C18/16 ,  C25D5/02 ,  C25D5/34 ,  C25D5/48

CPC classification number: H05K3/422 ,  H05K3/06 ,  C23C28/32 ,  C23C18/1689 ,  C25D5/022 ,  C25D5/34 ,  C25D5/48 ,  H05K2203/095

Abstract: A method for manufacturing a printed wiring board includes forming an electroless plating layer on a solder resist layer such that the electroless plating layer has a film thickness in the range of 0.05 μm to 0.70 μm, forming plating resist such that the plating resist has openings exposing portions of the electroless plating layer, applying electrolytic plating such that metal posts are formed in the openings of the plating resist, removing the plating resist, and etching the electroless plating layer exposed from the metal posts. The solder resist layer is formed such that the solder resist layer has openings exposing portions of the outermost conductor layer, the electroless plating layer is formed on the portions of the outermost conductor layer, and the plating resist is formed such that the openings of the plating resist expose the portions of the electroless plating layer formed in the openings of the solder resist layer.

公开(公告)号：US20220174815A1

公开(公告)日：2022-06-02

申请号：US17674038

申请日：2022-02-17

Applicant: IBIDEN CO., LTD.

Inventor： Akinori YOSHIDA ,  Katsuhiko TANNO

IPC: H05K1/11 ,  H05K3/34 ,  H05K3/46 ,  H05K3/40

Abstract: A printed wiring board includes a base insulating layer, a conductor layer formed on the base layer and including conductor pads, an underlayer formed on one of the conductor pads and including a metal different from a metal of the conductor layer, a solder resist layer formed on the base layer such that the solder resist layer is covering the conductor layer and has openings exposing the conductor pads, and a bump formed directly on a first conductor pad of the conductor pads and including a base plating layer formed in a first opening of the openings and a top plating layer formed on the base plating layer such that a metal of the base plating layer is same as the metal of the conductor layer. The conductor pads include a second conductor pad such that the second conductor pad is the one of the conductor pads having the underlayer.

公开(公告)号：US20230080335A1

公开(公告)日：2023-03-16

申请号：US17823210

申请日：2022-08-30

Applicant: IBIDEN CO., LTD.

Inventor： Satoru KAWAI ,  Katsuhiko TANNO ,  Susumu KAGOHASHI ,  Kentaro WADA

IPC: H05K1/03 ,  H05K3/46 ,  G06T7/00

Abstract: A printed wiring board includes a resin insulating layer including resin and particles, and a conductor layer formed on a surface of the resin insulating layer. The particles in the resin insulating layer include first particles and second particles such that the first particles are partially embedded in the resin and the second particles are completely embedded in the resin, and the resin insulating layer is formed such that the first particles has exposed surfaces exposed from the resin and covered surfaces covered by the resin, respectively, the surface of the resin insulating layer includes the first exposed surfaces, and a ratio of a second area to a first area is in a range of 0.1 to 0.25 where the first area is an area of the surface of the resin insulating layer, and the second area is obtained by summing areas of the exposed surfaces of the first particles.

公开(公告)号：US20150230346A1

公开(公告)日：2015-08-13

申请号：US14621828

申请日：2015-02-13

Applicant: IBIDEN CO., LTD.

Inventor： Katsuhiko TANNO ,  Yusuke KAWAMURA ,  Seito ADACHI

IPC: H05K3/34 ,  B32B38/10 ,  H05K3/00 ,  B32B37/24 ,  B23K1/00 ,  B23K3/06

CPC classification number: B32B38/10 ,  B23K1/0016 ,  B23K1/008 ,  B23K1/203 ,  B23K3/0623 ,  B23K2101/42 ,  H05K3/288 ,  H05K3/3478 ,  H05K2203/041 ,  H05K2203/043 ,  H05K2203/0557 ,  Y10T156/1057

Abstract: A method for manufacturing a printed wiring board includes clamping a mask device at clamping portioned formed in the mask device with a movable clamp device to apply tensile force to the mask device, positioning the mask device over a printed wiring board having connection pads, applying the tensile force to the mask device through the clamping portions such that a mask of the mask device undergoes elastic deformation and positions of opening portions in the mask are vertically aligned relative to positions of the connection pads of the printed wiring board, and loading solder balls through the opening portions in the mask onto the connection pads of the printed wiring board, respectively.

Abstract translation: 一种制造印刷电路板的方法，包括：利用可移动的夹紧装置将形成在掩模装置中的夹持部分的掩模装置夹持，以对该掩模装置施加张力，将掩模装置定位在具有连接焊盘的印刷线路板上， 通过夹持部分对掩模装置施加张力，使得掩模装置的掩模经历弹性变形，并且掩模中的开口部分的位置相对于印刷线路板的连接焊盘的位置垂直取向，并且通过 掩模中的开口部分分别连接到印刷电路板的连接焊盘上。