公开(公告)号：US09633837B2

公开(公告)日：2017-04-25

申请号：US14830681

申请日：2015-08-19

Applicant: Intel Corporation

Inventor： Vinodhkumar Raghunathan ,  Ebrahim Andideh

IPC: H01L23/532 ,  H01L21/02 ,  H01L21/768 ,  H01L23/498 ,  H01L21/48 ,  H01L23/538

CPC classification number: H01L21/02271 ,  H01L21/02123 ,  H01L21/0214 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02263 ,  H01L21/02274 ,  H01L21/4857 ,  H01L21/76802 ,  H01L21/76831 ,  H01L21/76877 ,  H01L23/49822 ,  H01L23/53228 ,  H01L23/53295 ,  H01L23/5389 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include forming a CVD dielectric material on a package dielectric material, and then forming a conductive material on the CVD dielectric material.

公开(公告)号：US09136221B2

公开(公告)日：2015-09-15

申请号：US13630500

申请日：2012-09-28

Applicant: INTEL CORPORATION

Inventor： Vinodhkumar Raghunathan ,  Ebrahim Andideh

IPC: H01L23/532 ,  H01L23/538 ,  H01L21/02 ,  H01L23/498 ,  H01L21/48

CPC classification number: H01L21/02271 ,  H01L21/02123 ,  H01L21/0214 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02263 ,  H01L21/02274 ,  H01L21/4857 ,  H01L21/76802 ,  H01L21/76831 ,  H01L21/76877 ,  H01L23/49822 ,  H01L23/53228 ,  H01L23/53295 ,  H01L23/5389 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include forming a CVD dielectric material on a package dielectric material, and then forming a conductive material on the CVD dielectric material.

Abstract translation: 描述了形成微电子封装结构的方法及由此形成的相关结构。 那些方法可以包括在封装电介质材料上形成CVD电介质材料，然后在CVD电介质材料上形成导电材料。

公开(公告)号：US10070537B2

公开(公告)日：2018-09-04

申请号：US15065620

申请日：2016-03-09

Applicant: INTEL CORPORATION

Inventor： Deepak Arora ,  Daniel N. Sobieski ,  Dilan Seneviratne ,  Ebrahim Andideh ,  James C. Meyer

IPC: B32B38/10 ,  H05K3/46 ,  C23C14/22 ,  H05K3/42 ,  H05K3/10 ,  H01L21/48 ,  B32B43/00 ,  H01L21/44 ,  H05K3/00 ,  H05K3/28 ,  H01L21/56

Abstract: Embodiments of the present disclosure are directed towards techniques and configurations for formation of a dielectric with a smooth surface. In one embodiment, a method includes providing a dielectric with first and second surfaces, a conductive feature formed on the first surface, and a laminate applied to the second surface, curing the second surface while the laminate remains applied, and removing the laminate. Other embodiments may be described and/or claimed.

公开(公告)号：US20160192508A1

公开(公告)日：2016-06-30

申请号：US15065620

申请日：2016-03-09

Applicant: INTEL CORPORATION

Inventor： Deepak Arora ,  Daniel N. Sobieski ,  Dilan Seneviratne ,  Ebrahim Andideh ,  James C. Meyer

IPC: H05K3/46 ,  H05K3/00 ,  H05K3/42 ,  C23C14/22 ,  C23C14/34

CPC classification number: H05K3/4644 ,  B32B38/10 ,  B32B43/006 ,  C23C14/228 ,  H01L21/44 ,  H01L21/48 ,  H01L21/565 ,  H05K3/0014 ,  H05K3/0035 ,  H05K3/0044 ,  H05K3/0055 ,  H05K3/107 ,  H05K3/281 ,  H05K3/42 ,  H05K2203/0554 ,  H05K2203/1105 ,  H05K2203/1152 ,  Y10T156/1168 ,  Y10T156/1978

Abstract: Embodiments of the present disclosure are directed towards techniques and configurations for formation of a dielectric with a smooth surface. In one embodiment, a method includes providing a dielectric with first and second surfaces, a conductive feature formed on the first surface, and a laminate applied to the second surface, curing the second surface while the laminate remains applied, and removing the laminate. Other embodiments may be described and/or claimed.

Abstract translation: 本公开的实施例涉及用于形成具有光滑表面的电介质的技术和配置。 在一个实施例中，一种方法包括提供具有第一表面和第二表面的电介质，形成在第一表面上的导电特征，以及施加到第二表面的层压板，在层压体保持施加时固化第二表面，以及去除层压体。 可以描述和/或要求保护其他实施例。