公开(公告)号：US11430942B2

公开(公告)日：2022-08-30

申请号：US16021425

申请日：2018-06-28

申请人： INTEL CORPORATION

发明人： Kaan Oguz ,  Tanay Gosavi ,  Sasikanth Manipatruni ,  Chia-Ching Lin ,  Gary Allen

IPC分类号： H01L43/02 ,  H01L43/10 ,  H01L43/12 ,  H01L27/22 ,  H01F41/30 ,  H01F10/32 ,  G11C11/16

摘要： A multilayer free magnetic layer structure for spin-based magnetic memory is provided herein. The multilayer free magnetic structure is employed in a magnetic tunnel junction (MTJ) and includes antiferromagnetically coupled magnetic layers. In some cases, the antiferromagnetic coupling is mediated by RKKY interaction with a Ru, Ir, Mo, Cu, or Rh spacer layer. In some cases, low damping magnetic materials, such as CoFeB, FeB, or CoFeBMo are used for the antiferromagnetically coupled magnetic layers. By employing the multilayer free magnetic structure for the MTJ as variously described herein, the critical or switching current can be significantly reduced compared to, for example, an MTJ employing a single-layer free magnetic layer. Thus, higher device efficiencies can be achieved. In some cases, the magnetic layers of the multilayer free magnetic structure are perpendicular magnets, which can be employed, for example, in perpendicular spin-orbit torque (pSOT) memory devices.

公开(公告)号：US20200006630A1

公开(公告)日：2020-01-02

申请号：US16024393

申请日：2018-06-29

申请人： Intel Corporation

发明人： Noriyuki Sato ,  Tanay Gosavi ,  Gary Allen ,  Sasikanth Manipatruni ,  Kaan Oguz ,  Kevin O'Brien ,  Christopher Wiegand ,  Angeline Smith ,  Tofizur Rahman ,  Ian Young ,  Ben Buford

IPC分类号： H01L43/02 ,  H01L43/12 ,  H01L27/22 ,  G11C11/16 ,  H01F10/32

摘要： A spin orbit torque (SOT) memory device includes a SOT electrode having a spin orbit coupling material. The SOT electrode has a first sidewall and a second sidewall opposite to the first sidewall. The SOT memory device further includes a magnetic tunnel junction device on a portion of the SOT electrode. A first MTJ sidewall intersects the first SOT sidewall and a portion of the first MTJ sidewall and the SOT sidewall has a continuous first slope. The MTJ device has a second sidewall that does not extend beyond the second SOT sidewall and at least a portion of the second MTJ sidewall has a second slope.

公开(公告)号：US20240355915A1

公开(公告)日：2024-10-24

申请号：US18137731

申请日：2023-04-21

申请人： Intel Corporation

发明人： Leonard P. Guler ,  Clifford J. Engel ,  Debaleena Nandi ,  Gary Allen ,  Nicholas A. Thomson ,  Saurabh Acharya ,  Umang Desai ,  Vivek Vishwakarma ,  Charles H. Wallace

IPC分类号： H01L29/775 ,  H01L27/088 ,  H01L29/06 ,  H01L29/423

CPC分类号： H01L29/775 ,  H01L27/088 ,  H01L29/0673 ,  H01L29/42392

摘要： Techniques are provided herein to form an integrated circuit that includes one or more backside conductive structures that extend through the device layer to contact one or more frontside contacts, such as frontside source or drain contacts. In an example, a given semiconductor device along a row of such devices may be separated from an adjacent semiconductor device along the row by a gate cut. The gate cut may be a dielectric wall that extends through an entire thickness of the gate structure around the semiconductor regions of the devices and also extends between source or drain regions of the devices. A backside conductive structure may extend through portions of the source or drain regions and also through a portion of one of the dielectric walls within the gate trench to contact one or more frontside contacts on the source or drain regions.

公开(公告)号：US20240321978A1

公开(公告)日：2024-09-26

申请号：US18125456

申请日：2023-03-23

申请人： Intel Corporation

发明人： Leonard P. Guler ,  Shengsi Liu ,  Baofu Zhu ,  Charles H. Wallace ,  Clifford J. Engel ,  Gary Allen ,  Saurabh Acharya ,  Thomas Obrien

IPC分类号： H01L29/417 ,  H01L29/06 ,  H01L29/40 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775

CPC分类号： H01L29/41733 ,  H01L29/0673 ,  H01L29/401 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/775

摘要： Techniques are provided herein to form semiconductor devices that include a contact over a given source or drain region that extends over the top of an adjacent source or drain region without contacting it. In an example, a semiconductor device includes a gate structure around a fin of semiconductor material that extends from a source or drain region, or one or more nanowires or nanoribbons or nanosheets of semiconductor material that extend from the source or drain region. A conductive contact is formed over the source or drain region that extends laterally across the source/drain trench above an adjacent source or drain region without contacting the adjacent source or drain region. The contact may extend along the source/drain trench through a dielectric wall (e.g., a gate cut) that extends orthogonally through the source/drain trench.

公开(公告)号：US20200006424A1

公开(公告)日：2020-01-02

申请号：US16022564

申请日：2018-06-28

申请人： Intel Corporation

发明人： Noriyuki Sato ,  Angeline Smith ,  Tanay Gosavi ,  Sasikanth Manipatruni ,  Kaan Oguz ,  Kevin O'Brien ,  Tofizur Rahman ,  Gary Allen ,  Atm G. Sarwar ,  Ian Young ,  Hui Jae Yoo ,  Christopher Weigand ,  Benjamin Buford

IPC分类号： H01L27/22 ,  G11C11/16 ,  H01F10/32 ,  H01L43/02 ,  H01L43/12 ,  H01F41/34

摘要： A spin orbit torque (SOT) memory device includes a magnetic tunnel junction (MTJ) device with one end coupled with a first electrode and an opposite end coupled with a second electrode including a spin orbit torque material. In an embodiment, a second electrode is coupled with the free magnet and coupled between a pair of interconnect line segments. The second electrode and the pair of interconnect line segments include a spin orbit torque material. The second electrode has a conductive path cross-section that is smaller than a cross section of the conductive path in at least one of the interconnect line segments.

公开(公告)号：US20240321738A1

公开(公告)日：2024-09-26

申请号：US18125455

申请日：2023-03-23

申请人： Intel Corporation

发明人： Leonard P. Guler ,  Prabhjot Kaur Luthra ,  Nidhi Khandelwal ,  Marie T. Conte ,  Saurabh Acharya ,  Shengsi Liu ,  Gary Allen ,  Clifford J. Engel ,  Charles H. Wallace

IPC分类号： H01L23/528 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/778

CPC分类号： H01L23/5283 ,  H01L27/092 ,  H01L29/0665 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/778

摘要： Techniques to form an integrated circuit having a bridging contact structure. A bridging contact structure may, for example, bridge between source/drain contacts and to an adjacent gate electrode within the same device layer. In an example, a gate cut structure extends in a first direction to separate the source or drain regions and gate structures of neighboring semiconductor devices. Contacts may be formed over the source or drain regions of the neighboring devices on opposite sides of the gate cut along a second direction orthogonal to the first direction. A portion of the gate cut is replaced with a first conductive bridge between the source or drain contacts. A portion of one or more dielectric barriers between one of the source or drain contacts and an adjacent gate electrode is replaced with a second conductive bridge in the first direction between the source or drain contact and the gate structure.

公开(公告)号：US11367749B2

公开(公告)日：2022-06-21

申请号：US16022564

申请日：2018-06-28

申请人： Intel Corporation

发明人： Noriyuki Sato ,  Angeline Smith ,  Tanay Gosavi ,  Sasikanth Manipatruni ,  Kaan Oguz ,  Kevin O'Brien ,  Tofizur Rahman ,  Gary Allen ,  Atm G. Sarwar ,  Ian Young ,  Hui Jae Yoo ,  Christopher Wiegand ,  Benjamin Buford

IPC分类号： H01L43/02 ,  H01L27/22 ,  G11C11/16 ,  H01F10/32 ,  H01L43/12 ,  H01F41/34

摘要： A spin orbit torque (SOT) memory device includes a magnetic tunnel junction (MTJ) device with one end coupled with a first electrode and an opposite end coupled with a second electrode including a spin orbit torque material. In an embodiment, a second electrode is coupled with the free magnet and coupled between a pair of interconnect line segments. The second electrode and the pair of interconnect line segments include a spin orbit torque material. The second electrode has a conductive path cross-section that is smaller than a cross section of the conductive path in at least one of the interconnect line segments.

公开(公告)号：US11251365B2

公开(公告)日：2022-02-15

申请号：US15942231

申请日：2018-03-30

申请人： Intel Corporation

发明人： Tanay Gosavi ,  Sasikanth Manipatruni ,  Kaan Oguz ,  Ian Young ,  Kevin O'Brien ,  Gary Allen ,  Noriyuki Sato

IPC分类号： H01L43/10 ,  G11C11/16 ,  H01L27/22 ,  H01L43/04 ,  H01L43/06 ,  H01L43/14 ,  B82Y25/00

摘要： An apparatus is provided which comprises: a magnetic junction having a magnet with a first magnetization; an interconnect adjacent to the magnetic junction, wherein the interconnect comprises an antiferromagnetic (AFM) material which is doped with a doping material (Pt, Ni, Co, or Cr) and a structure adjacent to the interconnect such that the magnetic junction and the structure are on opposite surfaces of the interconnect, wherein the structure comprises a magnet with a second magnetization substantially different from the first magnetization.

公开(公告)号：US11683939B2

公开(公告)日：2023-06-20

申请号：US16396451

申请日：2019-04-26

申请人： Intel Corporation

发明人： Benjamin Buford ,  Angeline Smith ,  Noriyuki Sato ,  Tanay Gosavi ,  Kaan Oguz ,  Christopher Wiegand ,  Kevin O'Brien ,  Tofizur Rahman ,  Gary Allen ,  Sasikanth Manipatruni ,  Emily Walker

IPC分类号： H10B61/00 ,  H10N50/10 ,  H10N52/00 ,  H10N52/01 ,  H10N52/80

CPC分类号： H10B61/22 ,  H10N50/10 ,  H10N52/00 ,  H10N52/01 ,  H10N52/80

摘要： A memory apparatus includes a first electrode having a spin orbit material. The memory apparatus further includes a first memory device on a portion of the first electrode and a first dielectric adjacent to a sidewall of the first memory device. The memory apparatus further includes a second memory device on a portion of the first electrode and a second dielectric adjacent to a sidewall of the second memory device. A second electrode is on and in contact with a portion of the first electrode, where the second electrode is between the first memory device and the second memory device. The second electrode has a lower electrical resistance than an electrical resistance of the first electrode. The memory apparatus further includes a first interconnect structure and a second interconnect, each coupled with the first electrode.

公开(公告)号：US11444237B2

公开(公告)日：2022-09-13

申请号：US16024393

申请日：2018-06-29

申请人： Intel Corporation

发明人： Noriyuki Sato ,  Tanay Gosavi ,  Gary Allen ,  Sasikanth Manipatruni ,  Kaan Oguz ,  Kevin O'Brien ,  Christopher Wiegand ,  Angeline Smith ,  Tofizur Rahman ,  Ian Young ,  Ben Buford

IPC分类号： H01L43/02 ,  H01L43/12 ,  H01L27/22 ,  G11C11/16 ,  H01F10/32 ,  H01L43/10 ,  G11C11/14

摘要： A spin orbit torque (SOT) memory device includes a SOT electrode having a spin orbit coupling material. The SOT electrode has a first sidewall and a second sidewall opposite to the first sidewall. The SOT memory device further includes a magnetic tunnel junction device on a portion of the SOT electrode. A first MTJ sidewall intersects the first SOT sidewall and a portion of the first MTJ sidewall and the SOT sidewall has a continuous first slope. The MTJ device has a second sidewall that does not extend beyond the second SOT sidewall and at least a portion of the second MTJ sidewall has a second slope.