公开(公告)号：US20220078027A1

公开(公告)日：2022-03-10

申请号：US17526563

申请日：2021-11-15

Applicant: INTEL CORPORATION

Inventor： SERGIU D. GHETIE ,  NEERAJ S. UPASANI ,  CHUKWUNENYE S. NNEBE ,  WON LEE ,  SHAILA R. MURTY ,  ARKADIUSZ BERENT ,  VASUKI CHILUKURI ,  DAVID T. MAYO ,  SCOTT P. BOBHOLZ ,  VINILA ROSE ,  WOJCIECH S. POWIERTOWSKI

IPC: H04L9/32 ,  H04L9/14 ,  G06Q10/08 ,  H04L9/30

Abstract: Techniques and apparatuses for issuance of license upgrades for hardware components in the field, as well as the hardware components, are described. In one embodiment, for example an apparatus may include processor circuitry and memory in communication with the processor circuitry, wherein the memory contains a configuration data block and license data block, the configuration data block being read from the memory via a licensing apparatus and the licensing data block being written to the memory by the licensing apparatus. The processor may include executable code to process the licensing data block to facilitate an upgrade of the capabilities of the processor circuitry.

公开(公告)号：US20190097810A1

公开(公告)日：2019-03-28

申请号：US15719375

申请日：2017-09-28

Applicant: INTEL CORPORATION

Inventor： SERGIU D. GHETIE ,  NEERAJ S. UPASANI ,  CHUKWUNENYE S. NNEBE ,  WON LEE ,  SHAILA R. MURTY ,  ARKADIUSZ BERENT ,  VASUKI CHILUKURI ,  DAVID T. MAYO ,  SCOTT P. BOBHOLZ ,  VINILA ROSE ,  WOJCIECH S. POWIERTOWSKI

IPC: H04L9/32 ,  H04L9/14 ,  H04L9/30 ,  G06Q10/08

Abstract: Techniques and apparatuses for issuance of license upgrades for hardware components in the field, as well as the hardware components, are described. In one embodiment, for example an apparatus may include processor circuitry and memory in communication with the processor circuitry, wherein the memory contains a configuration data block and license data block, the configuration data block being read from the memory via a licensing apparatus and the licensing data block being written to the memory by the licensing apparatus. The processor may include executable code to process the licensing data block to facilitate an upgrade of the capabilities of the processor circuitry.

公开(公告)号：US20200053438A1

公开(公告)日：2020-02-13

申请号：US16656009

申请日：2019-10-17

Applicant: INTEL CORPORATION

Inventor： ALBERTO J. MUNOZ ,  MURUGASAMY K. NACHIMUTHU ,  MOHAN J. KUMAR ,  WOJCIECH POWIERTOWSKI ,  SERGIU D. GHETIE ,  NEERAJ S. UPASANI ,  SAGAR V. DALVI ,  CHUKWUNENYE S. NNEBE ,  JEANNE GUILLORY

IPC: H04Q11/00 ,  H03M7/40 ,  H03M7/30 ,  G06F16/901 ,  G06F3/06 ,  H04L12/811 ,  G11C7/10 ,  H05K7/14 ,  G06F1/18 ,  G06F13/40 ,  H05K5/02 ,  G08C17/02 ,  H04L12/24 ,  H04L29/08 ,  H04L12/26 ,  H04L12/851 ,  G06F9/50 ,  H04L12/911 ,  G06F12/109 ,  H04L29/06 ,  G11C14/00 ,  G11C5/02 ,  G11C11/56 ,  G02B6/44 ,  G06F8/65 ,  G06F12/14 ,  G06F13/16 ,  H04B10/25 ,  G06F9/4401 ,  G02B6/38 ,  G02B6/42 ,  B25J15/00 ,  B65G1/04 ,  H05K7/20 ,  H04L12/931 ,  H04L12/939 ,  H04W4/02 ,  H04L12/751 ,  G06F13/42 ,  H05K1/18 ,  G05D23/19 ,  G05D23/20 ,  H04L12/927 ,  H05K1/02 ,  H04L12/781 ,  H04Q1/04 ,  G06F12/0893 ,  H05K13/04 ,  G11C5/06 ,  G06F11/14 ,  G06F11/34 ,  G06F12/0862 ,  G06F15/80 ,  H04L12/919 ,  G06F12/10 ,  G06Q10/06 ,  G07C5/00 ,  H04L12/28 ,  H04L29/12 ,  H04L9/06 ,  H04L9/14 ,  H04L9/32 ,  H04L12/933 ,  H04L12/947 ,  G06F9/30 ,  G06F9/38 ,  G06F9/54

Abstract: Embodiments are generally directed apparatuses, methods, techniques and so forth to receive a sled manifest comprising identifiers for physical resources of a sled, receive results of an authentication and validation operations performed to authenticate and validate the physical resources of the sled, determine whether the results of the authentication and validation operations indicate the physical resources are authenticate or not authenticate. Further and in response to the determination that the results indicate the physical resources are authenticated, permit the physical resources to process a workload, and in response to the determination that the results indicate the physical resources are not authenticated, prevent the physical resources from processing the workload.

公开(公告)号：US20190278932A1

公开(公告)日：2019-09-12

申请号：US16424558

申请日：2019-05-29

Applicant: INTEL CORPORATION

Inventor： NEERAJ S. UPASANI ,  DAVID P. TURLEY ,  SERGIU D. GHETIE ,  ZHANGPING CHEN ,  JASON G. SANDRI

IPC: G06F21/62 ,  G11C7/24 ,  G11C17/18 ,  G11C7/10 ,  G06F21/60

Abstract: Embodiments may be generally directed to techniques to encrypt and decrypt data in a first fuse block array using an encryption key of a second fuse block array, the second fuse block array having the encryption key comprising a plurality of segments of bits, an inverse encryption key comprising a second plurality of segments of bits, each segment of the inverse encryption key to correspond with a particular segment of the encryption key, and a random pattern having equally distributed bit values, the random pattern to enable detection of voltage attacks on the second fuse block array.

公开(公告)号：US20180095897A1

公开(公告)日：2018-04-05

申请号：US15283087

申请日：2016-09-30

Applicant: INTEL CORPORATION

Inventor： NEERAJ S. UPASANI ,  DAVID P. TURLEY ,  SERGIU D. GHETIE ,  ZHANGPING CHEN ,  JASON G. SANDRI

IPC: G06F12/14 ,  G06F21/62

CPC classification number: G06F21/6218 ,  G06F21/602 ,  G06F2221/2107 ,  G11C7/1006 ,  G11C7/24 ,  G11C17/18 ,  G11C29/787

Abstract: Embodiments may be generally directed to techniques to encrypt and decrypt data in a first fuse block array using an encryption key of a second fuse block array, the second fuse block array having the encryption key comprising a plurality of segments of bits, an inverse encryption key comprising a second plurality of segments of bits, each segment of the inverse encryption key to correspond with a particular segment of the encryption key, and a random pattern having equally distributed bit values, the random pattern to enable detection of voltage attacks on the second fuse block array.