中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

47 records (took 0.019 seconds)

    SELF-ALIGNED CARBON NANOTUBE TRANSISTOR INCLUDING SOURCE/DRAIN EXTENSIONS AND TOP GATE
    3.
    发明申请
    SELF-ALIGNED CARBON NANOTUBE TRANSISTOR INCLUDING SOURCE/DRAIN EXTENSIONS AND TOP GATE 有权
    自对准的碳纳米管晶体管，包括源/漏极扩展和顶栅

    公开(公告)号：US20160380218A1

    公开(公告)日：2016-12-29

    申请号：US14949992

    申请日：2015-11-24

    Applicant: International Business Machines Corporation

    Inventor： Ali Afzali-Ardakani ,  Aaron D. Franklin ,  George S. Tulevski

    IPC: H01L51/05 ,  H01L51/10 ,  H01L51/00

    CPC classification number: H01L51/055 ,  H01L51/0021 ,  H01L51/0048 ,  H01L51/0516 ,  H01L51/0541 ,  H01L51/105

    Abstract: A carbon nanotube semiconductor device includes at least one carbon nanotube disposed on an insulator portion of a substrate. The at least one carbon nanotube includes a non-doped channel portion interposed between a first doped source/drain portion and a second doped source/drain portion. A first source/drain contact stack is disposed on the first doped source/drain portion and an opposing second source/drain contact stack is disposed on the second doped source/drain portion. A replacement metal gate stack is interposed between the first and second source/drain contact stacks, and on the at least one carbon nanotube. The first and second doped source/drain portions are each vertically aligned with an inner edge of the first and second contact stacks, respectively.

    Abstract translation: 碳纳米管半导体器件包括设置在基板的绝缘体部分上的至少一个碳纳米管。 所述至少一个碳纳米管包括插入在第一掺杂源极/漏极部分和第二掺杂源极/漏极部分之间的非掺杂沟道部分。 第一源极/漏极接触堆叠设置在第一掺杂源极/漏极部分上，并且相对的第二源极/漏极接触堆叠设置在第二掺杂源极/漏极部分上。 在第一和第二源极/漏极接触堆叠之间以及至少一个碳纳米管之间插入替换金属栅极叠层。 第一和第二掺杂源极/漏极部分别分别与第一和第二接触叠层的内边缘垂直对准。

    Transistors from vertical stacking of carbon nanotube thin films
    6.
    发明授权
    Transistors from vertical stacking of carbon nanotube thin films 有权
    晶体管从碳纳米管薄膜的垂直堆叠

    公开(公告)号：US09105702B2

    公开(公告)日：2015-08-11

    申请号：US13679613

    申请日：2012-11-16

    Applicant: International Business Machines Corporation

    Inventor： Aaron D. Franklin ,  Joshua T. Smith ,  George S. Tulevski

    IPC: H01L29/06 ,  H01L29/08 ,  H01L29/775 ,  H01L29/66 ,  B82Y10/00 ,  B82Y15/00 ,  B82Y40/00 ,  H01L51/00 ,  H01L51/05

    CPC classification number: H01L29/775 ,  B82Y10/00 ,  B82Y15/00 ,  B82Y40/00 ,  H01L29/66045 ,  H01L51/0048 ,  H01L51/0554 ,  H01L51/0558

    Abstract: A carbon nanotube field-effect transistor is disclosed. The carbon nanotube field-effect transistor includes a first carbon nanotube film, a first gate layer coupled to the first carbon nanotube film and a second carbon nanotube film coupled to the first gate layer opposite the first gate layer. The first gate layer is configured to influence an electric field within the first carbon nanotube film as well as to influence an electric field of the second carbon nanotube film. At least one of a source contact and a drain contact are coupled to the first and second carbon nanotube film and are separated from the first gate layer by an underlap region.

    Abstract translation: 公开了一种碳纳米管场效应晶体管。 碳纳米管场效应晶体管包括第一碳纳米管膜，耦合到第一碳纳米管膜的第一栅极层和耦合到与第一栅极层相对的第一栅极层的第二碳纳米管膜。 第一栅极层被配置为影响第一碳纳米管膜内的电场以及影响第二碳纳米管膜的电场。 源极触点和漏极触点中的至少一个耦合到第一和第二碳纳米管膜，并且通过欠叠区域与第一栅极层分离。

    SEMICONDUCTOR DEVICE WITH BALLISTIC GATE LENGTH STRUCTURE
    7.
    发明申请
    SEMICONDUCTOR DEVICE WITH BALLISTIC GATE LENGTH STRUCTURE 有权
    具有弹性门长度结构的半导体器件

    公开(公告)号：US20150194619A1

    公开(公告)日：2015-07-09

    申请号：US14150275

    申请日：2014-01-08

    Applicant: International Business Machines Corporation

    Inventor： Aaron D. Franklin ,  Shu-Jen Han ,  Satyavolu S. Papa Rao ,  Joshua T. Smith

    IPC: H01L51/05 ,  H01L51/00

    CPC classification number: H01L51/0554 ,  H01L51/0023 ,  H01L51/0048 ,  H01L51/0545 ,  H01L51/055 ,  H01L51/0558

    Abstract: Embodiments of the invention include a method of fabrication and a semiconductor structure. The method of fabrication includes depositing a first dielectric material on a substrate, and forming a bottom gate comprising filling a first opening in the first dielectric layer with a first conductive material. Next, depositing a second dielectric material, and forming a trench in the second dielectric material down to the first conductive material. Next, depositing a second conductive material on the sidewall of the trench forming an electrical connection between the first conductive material and the second conductive material, depositing a third dielectric material in the trench, and removing excess material not in the trench. Next, depositing a gate dielectric layer, and forming a channel layer of carbon nanotubes on the gate dielectric layer. Lastly, depositing a third conductive material on the channel layer forming source and drain terminals.

    Abstract translation: 本发明的实施例包括制造方法和半导体结构。 制造方法包括在衬底上沉积第一介电材料，以及形成底栅，包括用第一导电材料填充第一介电层中的第一开口。 接下来，沉积第二介电材料，并在第二电介质材料中形成沟槽，直到第一导电材料。 接下来，在沟槽的侧壁上沉积第二导电材料，形成第一导电材料和第二导电材料之间的电连接，在沟槽中沉积第三电介质材料，以及除去不在沟槽中的多余材料。 接下来，沉积栅极电介质层，并在栅极电介质层上形成碳纳米管的沟道层。 最后，在形成源极和漏极端子的沟道层上沉积第三导电材料。

    Vertical stacking of graphene in a field-effect transistor
    10.
    发明授权
    Vertical stacking of graphene in a field-effect transistor 有权
    在场效应晶体管中垂直堆叠石墨烯

    公开(公告)号：US08932919B2

    公开(公告)日：2015-01-13

    申请号：US13683148

    申请日：2012-11-21

    Applicant: International Business Machines Corporation

    Inventor： Damon B. Farmer ,  Aaron D. Franklin ,  Sataoshi Oida ,  Joshua T. Smith

    IPC: H01L29/66 ,  H01L21/336

    CPC classification number: H01L29/66045 ,  H01L29/1606 ,  H01L29/517 ,  H01L29/778

    Abstract: A graphene field-effect transistor is disclosed. The graphene field-effect transistor includes a first graphene sheet, a first gate layer coupled to the first graphene sheet and a second graphene sheet coupled to the first gate layer opposite the first gate layer. The first gate layer is configured to influence an electric field within the first graphene sheet as well as to influence an electric field of the second graphene sheet.

    Abstract translation: 公开了一种石墨烯场效应晶体管。 石墨烯场效应晶体管包括第一石墨烯片，耦合到第一石墨烯片的第一栅极层和耦合到与第一栅极层相对的第一栅极层的第二石墨烯片。 第一栅极层被配置为影响第一石墨烯片内的电场以及影响第二石墨烯片的电场。

Patent Agency Ranking