-
公开(公告)号：US10345136B2
公开(公告)日：2019-07-09
申请号：US15649809
申请日：2017-07-14
Applicant: International Business Machines Corporation
Inventor： Martin Eckert , Siegfried Tomaschko , Roland Dieterle
Abstract: The disclosure relates to an adjustable load transmitter for adjusting an alignment between planar members separated from each other by a gap. The load transmitter comprises a set of plates to be received inside the gap, the set comprising two rotatable plates and being adapted for transmitting a load via a load transmission path between the planar members. The load transmission path comprises the rotatable plates. Each of the plates comprises two flat, non-parallel contact faces, and one of the contact faces of the first rotatable plate is in permanent surface contact with one of the contact faces of the second rotatable plate. The rotatable plates are adapted for being rotated relative to each other around one of their respective normal axes.
-
公开(公告)号：US20190017861A1
公开(公告)日：2019-01-17
申请号：US15649809
申请日：2017-07-14
Applicant: International Business Machines Corporation
Inventor： Martin Eckert , Siegfried Tomaschko , Roland Dieterle
CPC classification number: G01G3/1414 , F16M11/00 , F16M13/00 , G01B5/14 , G01B5/24 , G03F9/7015 , G03F9/703
Abstract: The disclosure relates to an adjustable load transmitter for adjusting an alignment between planar members separated from each other by a gap. The load transmitter comprises a set of plates to be received inside the gap, the set comprising two rotatable plates and being adapted for transmitting a load via a load transmission path between the planar members. The load transmission path comprises the rotatable plates. Each of the plates comprises two flat, non-parallel contact faces, and one of the contact faces of the first rotatable plate is in permanent surface contact with one of the contact faces of the second rotatable plate. The rotatable plates are adapted for being rotated relative to each other around one of their respective normal axes.
-
公开(公告)号：US10114914B2
公开(公告)日：2018-10-30
申请号：US15823712
申请日：2017-11-28
Applicant: International Business Machines Corporation
Inventor： Martin Eckert , Thomas Gentner , Jens Kuenzer , Antje Mueller , Thomas Strach , Otto A. Torreiter
IPC: G06F17/50
Abstract: A system for layout effect characterization of an integrated circuit includes a memory having computer readable instructions and a processor for executing the computer readable instructions. The computer readable instructions include selecting an adjustable clock setting of an input clock for a layout effect characterization circuit of the integrated circuit and enabling a predetermined duty cycle of the input clock to pass through a plurality of inverting device chains including a reference chain and one or more chains having a different inverting device arrangement and a same number of inverting devices per chain. The computer readable instructions also include measuring a captured output of the one or more chains having the different inverting device arrangement and a captured output of the reference chain.
-
公开(公告)号：US20180107771A1
公开(公告)日：2018-04-19
申请号：US15823712
申请日：2017-11-28
Applicant: International Business Machines Corporation
Inventor： Martin Eckert , Thomas Gentner , Jens Kuenzer , Antje Mueller , Thomas Strach , Otto A. Torreiter
IPC: G06F17/50
CPC classification number: G06F17/5009 , G06F17/5036 , G06F17/5081 , G06F2217/84
Abstract: A system for layout effect characterization of an integrated circuit includes a memory having computer readable instructions and a processor for executing the computer readable instructions. The computer readable instructions include selecting an adjustable clock setting of an input clock for a layout effect characterization circuit of the integrated circuit and enabling a predetermined duty cycle of the input clock to pass through a plurality of inverting device chains including a reference chain and one or more chains having a different inverting device arrangement and a same number of inverting devices per chain. The computer readable instructions also include measuring a captured output of the one or more chains having the different inverting device arrangement and a captured output of the reference chain.
-
公开(公告)号：US09627017B1
公开(公告)日：2017-04-18
申请号：US14863689
申请日：2015-09-24
Applicant: International Business Machines Corporation
Inventor： Martin Eckert , Michael B. Kugel , Otto A. Torreiter , Tobias Werner
CPC classification number: G11C29/023 , G11C5/04 , G11C7/10 , G11C7/22 , G11C15/00 , G11C15/04 , G11C29/028 , G11C29/12 , G11C29/32
Abstract: Embodiments of the present invention provide systems and methods for a RAM at speed flexible timing and setup control. The memory module includes: a module connected to a functional logic circuitry; first timing control latches of a first scan-in chain; a timing configuration circuitry controllable by timing and control configuration signals; selection circuits connected to each output line of the first timing control latches; and an output signal of the timing configuration circuitry is connected to input lines of the selection circuits, such that two sets of control data are operatively connected to the control input lines of the memory cells under test, without a reloading of the respective timing control latches.
-
Patent Agency Ranking
公开(公告)号：US20160293497A1
公开(公告)日：2016-10-06
申请号：US14672654
申请日：2015-03-30
Applicant: International Business Machines Corporation
Inventor： Martin Eckert , Eckhard Kunigkeit , Otto A. Torreiter , Quintino L. Trianni
IPC: H01L21/66
CPC classification number: H01L22/12 , H01L22/14 , H01L22/20 , H01L22/34 , H01L23/345 , H01L23/38 , H01L23/473 , H01L23/49811 , H01L24/16 , H01L24/17 , H01L24/81 , H01L25/0657 , H01L25/18 , H01L25/50 , H01L2224/16145 , H01L2224/16227 , H01L2224/17181 , H01L2224/73253 , H01L2224/81815 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2225/06589 , H01L2225/06596 , H01L2924/14 , H01L2924/1434 , H01L2924/15311 , H01L2924/3511 , H01L2924/37001
Abstract: A method for soldering three-dimensional integrated circuits is provided. A three-dimensional integrated circuit is heated to a base temperature, wherein the base temperature is lower than the melting point of a solder, and wherein the three-dimensional integrated circuit includes a plurality of solder bumps. A first on-chip heat source reflows a first portion of the plurality of solder bumps that is within a first local-hot-zone. A second on-chip heat source reflows a second portion of the plurality of solder bumps that is within a second local-hot-zone.
Abstract translation: 提供了一种用于焊接三维集成电路的方法。 三维集成电路被加热到基底温度，其中基底温度低于焊料的熔点，并且其中三维集成电路包括多个焊料凸块。 第一片上热源回流在第一局部热区内的多个焊料凸块的第一部分。 第二片上热源回流在第二局部热区内的多个焊料凸点的第二部分。
-
公开(公告)号：US20210066183A1
公开(公告)日：2021-03-04
申请号：US16559807
申请日：2019-09-04
Applicant: International Business Machines Corporation
Inventor： Otto Andreas Torreiter , Thomas Gentner , Martin Eckert
IPC: H01L23/522 , G01R31/28 , G01R31/265 , G01Q60/14
Abstract: The invention relates to an integrated circuit with an active transistor area and a plurality of wiring layers arranged above the active transistor area. At least one optical device is integrated in the active transistor area. The optical device is electrically connected with at least one of the wiring layers. At least one optical tunnel extends from the at least one optical device through the plurality of wiring layers to a surface of an uppermost wiring layer of the plurality of wiring layers facing away from the active transistor area.
-
公开(公告)号：US10347337B2
公开(公告)日：2019-07-09
申请号：US15834221
申请日：2017-12-07
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Martin Eckert , Alexander Fritsch
Abstract: A logic circuit is provided including at least two input cells and a sense circuit. The input cells are connected to a common result line. Further, the input cells are operable for influencing an electrical quantity at the result line. The sense circuit is connected to the result line, and is adapted to output a discrete value out of more than two possible values based on the electrical quantity.
-
公开(公告)号：US20190018043A1
公开(公告)日：2019-01-17
申请号：US15649762
申请日：2017-07-14
Applicant: International Business Machines Corporation
Inventor： Martin Eckert , Roland Dieterle , Siegfried Tomaschko
Abstract: An adjustable load transmitter for adjusting an alignment between a probe card and a bridge beam of a wafer prober, where the probe card is separated from the bridge beam by a gap. The adjustable load transmitter located in the gap, the adjustable load transmitter comprising two rotatable plates adapted for transmitting a load via a load transmission path between the bridge beam and the wafer prober and each comprising two flat, non-parallel contact faces. The adjustable load transmitter removes an angular misalignment between the bridge beam and the set of plates by rotating each of the rotatable plates about a pre-determined adjustment angle such that two angles of inclination are adjusted to zero. The adjustable load transmitter establishes the load transmission path by closing a clearance between the bridge beam and the contact face.
-
公开(公告)号：US10114069B2
公开(公告)日：2018-10-30
申请号：US14965163
申请日：2015-12-10
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Martin Eckert , Eckhard Kunigkeit , Otto A. Torreiter , Quintino L. Trianni
IPC: G01R31/28 , H05K3/34 , H01L25/065 , H01L23/498 , H05K3/32 , H01L21/66 , H01L23/31
Abstract: A method for electrical testing of a 3-D integrated circuit chip stack is described. The 3-D integrated circuit chip stack comprises at least a first integrated circuit chip and a second integrated circuit chip. The first integrated circuit chip and the second integrated circuit chip are not soldered together for performing electrical testing.
-
-
-
-
-
-
-
-
-
Search Results
52
records
(took 0.022 seconds)
