Semiconductor chip shape alteration
    6.
    发明授权
    Semiconductor chip shape alteration 失效
    半导体芯片形状改变

    公开(公告)号:US07648891B2

    公开(公告)日:2010-01-19

    申请号:US11615236

    申请日:2006-12-22

    IPC分类号: H01L21/78

    摘要: The invention is directed to an improved semiconductor chip that reduces crack initiation and propagation into the active area of a semiconductor chip. A semiconductor wafer includes dicing channels that separate semiconductor chips and holes through a portion of a semiconductor chip, which are located at the intersection of the dicing channels. Once diced from the semiconductor wafer, semiconductor chips are created without ninety degree angle corners.

    摘要翻译: 本发明涉及一种改进的半导体芯片,其减少裂纹发生和传播到半导体芯片的有源区域。 半导体晶片包括分开半导体芯片和穿过半导体芯片的位于切割通道的交叉点的部分的切割通道。 一旦从半导体晶片切割,半导体芯片就不会产生90度角角。

    SEMICONDUCTOR CHIP SHAPE ALTERATION
    7.
    发明申请
    SEMICONDUCTOR CHIP SHAPE ALTERATION 审中-公开
    半导体芯片形状改变

    公开(公告)号:US20100019354A1

    公开(公告)日:2010-01-28

    申请号:US12573364

    申请日:2009-10-05

    IPC分类号: H01L23/58 H01L23/544

    摘要: The invention is directed to an improved semiconductor chip that reduces crack initiation and propagation into the active area of a semiconductor chip. A semiconductor wafer includes dicing channels that separate semiconductor chips and holes through a portion of a semiconductor chip, which are located at the intersection of the dicing channels. Once diced from the semiconductor wafer, semiconductor chips are created without ninety degree angle corners.

    摘要翻译: 本发明涉及一种改进的半导体芯片,其减少裂纹发生和传播到半导体芯片的有源区域。 半导体晶片包括分开半导体芯片和穿过半导体芯片的位于切割通道的交叉点的部分的切割通道。 一旦从半导体晶片切割,半导体芯片就不会产生90度角角。

    VIA STACK STRUCTURES
    8.
    发明申请
    VIA STACK STRUCTURES 审中-公开
    通过堆叠结构

    公开(公告)号:US20080029898A1

    公开(公告)日:2008-02-07

    申请号:US11461511

    申请日:2006-08-01

    IPC分类号: H01L23/48

    摘要: Via stack structures are disclosed. In one embodiment, a structure includes a via stack including: a first substantially cross-shaped line in a first dielectric layer; a second substantially cross-shaped line set in a second dielectric layer, and a via stud coupling the first substantially cross-shaped line to the second substantially cross-shaped line. In another embodiment, a structure includes a first via stack, and a second via stack, wherein the first via stack and the second via stack extend in a divergent manner from one another. Each via stack structure is useful for support, for example, in under wire bond applications. The via stack structures can be mixed with other via stack structures and selectively placed within a layout to replace conventional metal plate and via stud array configurations.

    摘要翻译: 公开了通过堆叠结构。 在一个实施例中,结构包括通孔堆叠,其包括:第一介电层中的第一基本十字形的线; 设置在第二电介质层中的第二基本上十字形的线,以及将第一基本上十字形的线耦合到第二基本十字形线的通孔柱。 在另一个实施例中,结构包括第一通孔堆叠和第二通孔堆叠,其中第一通孔堆叠和第二通孔堆叠以彼此发散的方式延伸。 每个通孔堆叠结构可用于支持,例如在引线键合应用中。 通孔堆叠结构可以与其它通孔堆叠结构混合并且选择性地放置在布局内以代替传统的金属板和经由螺柱阵列配置。

    SEMICONDUCTOR CHIP SHAPE ALTERATION
    10.
    发明申请
    SEMICONDUCTOR CHIP SHAPE ALTERATION 失效
    半导体芯片形状改变

    公开(公告)号:US20080150087A1

    公开(公告)日:2008-06-26

    申请号:US11615236

    申请日:2006-12-22

    IPC分类号: H01L23/544 H01L21/00

    摘要: The invention is directed to an improved semiconductor chip that reduces crack initiation and propagation into the active area of a semiconductor chip. A semiconductor wafer includes dicing channels that separate semiconductor chips and holes through a portion of a semiconductor chip, which are located at the intersection of the dicing channels. Once diced from the semiconductor wafer, semiconductor chips are created without ninety degree angle corners.

    摘要翻译: 本发明涉及一种改进的半导体芯片,其减少裂纹发生和传播到半导体芯片的有源区域。 半导体晶片包括分开半导体芯片和穿过半导体芯片的位于切割通道的交叉点的部分的切割通道。 一旦从半导体晶片切割,半导体芯片就不会产生90度角角。