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1.发明授权公开(公告)号：US10761140B2
公开(公告)日：2020-09-01
申请号：US16038223
申请日：2018-07-18
Applicant: Infineon Technologies AG
Inventor： Oliver Frank , Christoph Hazott , Georg Krebelder , Bruno Mariacher , Otto Pfabigan , Sebastian Pointner , Ralf Reiterer , Florian Starzer
IPC: G01R31/319 , G06F30/33 , G06F30/327 , G01R31/317 , H01L21/66
Abstract: A method for producing a semiconductor device is described. In accordance with one example embodiment, the method comprises providing a virtual DUT in the form of a behavior model of the semiconductor device and developing at least one test in a test development environment for an automatic test equipment (ATE). In this case, commands are generated by means of the test development environment, which commands are converted into test signals by means of a software interface, which test signals are fed to the virtual DUT and are processable by the latter. The software interface processes response signals of the virtual DUT and reports information dependent on the response signals back to the test development environment.
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公开(公告)号：US20180003754A1
公开(公告)日：2018-01-04
申请号：US15634588
申请日：2017-06-27
Applicant: Infineon Technologies AG
Inventor： Jochen O. Schrattenecker , Oliver Frank , Alexander Kaineder
IPC: G01R29/10 , G01R31/302 , G01S7/40 , G01R1/04 , H01Q1/32
Abstract: A test set-up for testing a system-in package with an integrated antenna is described herein. According to one exemplary embodiment, the test set-up includes a carrier with an RF probe arranged thereon and a test socket with resilient electric contacts. The test socket is mounted on the carrier and provides an electric contact to interconnects of the package when it is placed on the test socket. The test socket has an opening which is arranged superjacent to the RF probe.
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公开(公告)号：US20150168456A1
公开(公告)日：2015-06-18
申请号：US14571507
申请日：2014-12-16
Applicant: Infineon Technologies AG
Inventor： Karl Dominizi , Oliver Frank , Klaus Standner , Stefan Zielke
CPC classification number: G01R31/2889
Abstract: A probe card for a wafer tester includes a mother card having a reinforcing element and at least one daughter card which is rigidly connected to the reinforcing element detachably. The mother card includes electrical contacts for producing an electrical connection with the wafer tester. The at least one daughter card includes electrical contact elements for making contact with an electrical circuit on a wafer. In addition, the mother card and the at least one daughter card are electrically detachably connected to one another via an electrical interface.
Abstract translation: 用于晶片测试器的探针卡包括具有加强元件的母卡和可拆卸地刚性地连接到加强元件的至少一个子卡。 母卡包括用于与晶片测试器产生电连接的电触点。 至少一个子卡包括用于与晶片上的电路接触的电接触元件。 此外，母卡和至少一个子卡经由电接口彼此电可拆卸地连接。
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公开(公告)号：US10761186B2
公开(公告)日：2020-09-01
申请号：US15834118
申请日：2017-12-07
Applicant: Infineon Technologies AG
Inventor： Jochen O. Schrattenecker , Florian Starzer , Oliver Frank , Michael Kropfitsch , Georg Krebelder , Helmut Kollmann , Thomas Sailer
Abstract: A radar device comprises a test signal generator including a digital harmonic oscillator that generates a digital oscillator signal with a first spectral component; a first digital-to-analog-converter that generates an analog oscillator signal based on the digital oscillator signal. Furthermore, the radar device comprises at least one radar channel receiving the analog oscillator signal during one or more self-tests.
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公开(公告)号：US10184978B2
公开(公告)日：2019-01-22
申请号：US14571507
申请日：2014-12-16
Applicant: Infineon Technologies AG
Inventor： Karl Dominizi , Oliver Frank , Klaus Standner , Stefan Zielke
IPC: G01R31/28
Abstract: A probe card for a wafer tester includes a mother card having a reinforcing element and at least one daughter card which is rigidly connected to the reinforcing element detachably. The mother card includes electrical contacts for producing an electrical connection with the wafer tester. The at least one daughter card includes electrical contact elements for making contact with an electrical circuit on a wafer. In addition, the mother card and the at least one daughter card are electrically detachably connected to one another via an electrical interface.
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Patent Agency Ranking
公开(公告)号：US10574367B2
公开(公告)日：2020-02-25
申请号：US16174867
申请日：2018-10-30
Applicant: Infineon Technologies AG
Inventor： Karl Dominizi , Oliver Frank , Herbert Jaeger , Herbert Knapp , Hao Li , Florian Starzer , Rainer Stuhlberger , Jonas Kammerer
Abstract: One exemplary embodiment of the present invention relates to a circuit that includes at least one RF signal path for an RF signal and at least one power sensor, which is coupled to the RF signal path and configured to generate a sensor signal representing the power of the RF signal during normal operation of the circuit. The circuit further includes a circuit node for receiving an RF test signal during calibration operation of the circuit. The circuit node is coupled to the at least one power sensor, so that the at least one power sensor receives the RF test signal additionally or alternatively to the RF signal and generates the sensor signal as representing the power of the RF test signal.
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公开(公告)号：US10564202B2
公开(公告)日：2020-02-18
申请号：US15634588
申请日：2017-06-27
Applicant: Infineon Technologies AG
Inventor： Jochen O. Schrattenecker , Oliver Frank , Alexander Kaineder
IPC: G01R29/10 , G01R31/302 , G01S7/40 , G01R1/04 , H01Q1/32
Abstract: A test set-up for testing a system-in package with an integrated antenna is described herein. According to one exemplary embodiment, the test set-up includes a carrier with an RF probe arranged thereon and a test socket with resilient electric contacts. The test socket is mounted on the carrier and provides an electric contact to interconnects of the package when it is placed on the test socket. The test socket has an opening which is arranged superjacent to the RF probe.
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公开(公告)号：US10128962B2
公开(公告)日：2018-11-13
申请号：US15145485
申请日：2016-05-03
Applicant: Infineon Technologies AG
Inventor： Karl Dominizi , Oliver Frank , Herbert Jaeger , Herbert Knapp , Hao Li , Florian Starzer , Rainer Stuhlberger , Jonas Wursthorn
Abstract: One exemplary embodiment of the present invention relates to a circuit that includes at least one RF signal path for an RF signal and at least one power sensor, which is coupled to the RF signal path and configured to generate a sensor signal representing the power of the RF signal during normal operation of the circuit. The circuit further includes a circuit node for receiving an RF test signal during calibration operation of the circuit. The circuit node is coupled to the at least one power sensor, so that the at least one power sensor receives the RF test signal additionally or alternatively to the RF signal and generates the sensor signal as representing the power of the RF test signal.
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公开(公告)号：US10090939B2
公开(公告)日：2018-10-02
申请号：US15685542
申请日：2017-08-24
Applicant: Infineon Technologies AG
Inventor： Oliver Frank , Guenter Haider , Jochen O. Schrattenecker
Abstract: An integrated circuit is described herein. According to one or more embodiments, the integrated circuit includes a local oscillator with a voltage-controlled oscillator (VCO) that generates a local oscillator signal. Further, the integrated circuit includes a frequency divider coupled to the VCO downstream thereof. The frequency divider provides a frequency-divided local oscillator signal by reducing the frequency of the local oscillator signal by a constant factor. A first test pad of the integrated circuit is configured to receive a reference oscillator signal. Further, the integrated circuit includes a first mixer that receives the reference oscillator signal and the frequency-divided local oscillator signal to down-convert the frequency-divided local oscillator signal.
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公开(公告)号：US10057795B2
公开(公告)日：2018-08-21
申请号：US15610840
申请日：2017-06-01
Applicant: Infineon Technologies AG
Inventor： Florian Starzer , Peter Bogner , Oliver Frank , Guenter Haider , Michael Kropfitsch , Thomas Sailer , Jochen O. Schrattenecker , Rainer Stuhlberger
CPC classification number: H04W24/06 , H03F3/195 , H03F2200/165 , H03F2200/333 , H03F2200/451 , H03M1/1245 , H04B1/16
Abstract: A radio frequency (RF) receive circuit is described herein. In accordance with one embodiment, the RF receive circuit includes a mixer configured to receive an RF input signal to down-convert the RF input signal into a base-band or intermediate frequency (IF) band, an analog-to-digital converter (ADC), and a signal processing chain coupled between the mixer and the ADC. The signal processing chain includes at least two circuit nodes. The RF receive circuit further includes an oscillator circuit that is configured to generate a test signal. The oscillator circuit is coupled to the signal processing chain and is configured to selectively feed the oscillator signal into one of the at least two circuit nodes.
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