Memory arrangement and method for reading a memory cell of a memory

    公开(公告)号:US10134452B2

    公开(公告)日:2018-11-20

    申请号:US15421475

    申请日:2017-02-01

    Inventor: Ulrich Loibl

    Abstract: According to one embodiment, a memory arrangement is described a memory including a memory cell and a sense amplifier coupled to the memory cell having a node whose potential depends on the difference between a current through the memory cell and a reference current, a detection circuit configured to generate a signal representing whether the current through the memory cell is above or below the reference current based on the potential of the node and a limitation circuit configured to receive the signal and to limit the change of the potential of the node caused by the difference between the current through the memory cell and the reference current in response to the signal.

    Sense amplifier circuit, memory device, method for determining a state value of a resistive memory cell and method for operating a memory device

    公开(公告)号:US10685706B2

    公开(公告)日:2020-06-16

    申请号:US16273521

    申请日:2019-02-12

    Inventor: Ulrich Loibl

    Abstract: A sense amplifier circuit is provided for determining a state value of a resistive memory cell, wherein the resistive memory cell comprises a first resistive memory cell element, by means of a second resistive memory cell element, which is part of the resistive memory cell or a memory cell-external reference memory cell element. The sense amplifier circuit can include: a switch structure, a first storage element, a second storage element, and a control circuit. The control circuit controls the switch structure in such a way that in a first phase an electrical voltage present at the first resistive memory cell element or a voltage derived therefrom is fed to the first storage element and an electrical voltage present at the second resistive memory cell element or a voltage derived therefrom is fed to the second storage element. And in a second phase an electrical voltage present at the first resistive memory cell element or a voltage derived therefrom is provided and an electrical voltage present at the second resistive memory cell element or a voltage derived therefrom is provided. An evaluation circuit is configured to determine a state value of the resistive memory cell using the voltages fed to the storage elements in the first phase, or values derived therefrom, and the voltages provided in the second phase, or values derived therefrom.

    SENSE AMPLIFIER CIRCUIT, MEMORY DEVICE, METHOD FOR DETERMINING A STATE VALUE OF A RESISTIVE MEMORY CELL AND METHOD FOR OPERATING A MEMORY DEVICE

    公开(公告)号:US20190259451A1

    公开(公告)日:2019-08-22

    申请号:US16273521

    申请日:2019-02-12

    Inventor: Ulrich Loibl

    Abstract: A sense amplifier circuit is provided for determining a state value of a resistive memory cell, wherein the resistive memory cell comprises a first resistive memory cell element, by means of a second resistive memory cell element, which is part of the resistive memory cell or a memory cell-external reference memory cell element. The sense amplifier circuit can include: a switch structure, a first storage element, a second storage element, and a control circuit. The control circuit controls the switch structure in such a way that in a first phase an electrical voltage present at the first resistive memory cell element or a voltage derived therefrom is fed to the first storage element and an electrical voltage present at the second resistive memory cell element or a voltage derived therefrom is fed to the second storage element. And in a second phase an electrical voltage present at the first resistive memory cell element or a voltage derived therefrom is provided and an electrical voltage present at the second resistive memory cell element or a voltage derived therefrom is provided. An evaluation circuit is configured to determine a state value of the resistive memory cell using the voltages fed to the storage elements in the first phase, or values derived therefrom, and the voltages provided in the second phase, or values derived therefrom.

    Charge Pumps with Improved Latchup Characteristics
    8.
    发明申请
    Charge Pumps with Improved Latchup Characteristics 审中-公开
    充电泵具有改进的闩锁特性

    公开(公告)号:US20150155777A1

    公开(公告)日:2015-06-04

    申请号:US14618490

    申请日:2015-02-10

    Abstract: Some embodiments of the present disclosure relate to improved regulators for charge pumps. Such regulators selectively activate a charge pump based not only on the voltage output of the charge pump, but also on an series of wake-up pulses that are delivered at predetermined time intervals and which are delivered independently of the voltage output of the charge pump. Hence, these wake-up pulses prevent extended periods of time in which the charge pump is inactive, thereby helping to prevent latch-up in some situations.

    Abstract translation: 本公开的一些实施例涉及用于电荷泵的改进的调节器。 这种调节器不仅基于电荷泵的电压输出而且基于以预定的时间间隔传送并且独立于电荷泵的电压输出传送的一系列唤醒脉冲来选择性地激活电荷泵。 因此,这些唤醒脉冲防止电荷泵不活动的延长的时间段,从而有助于在某些情况下防止闩锁。

    CHARGE PUMPS WITH IMPROVED LATCHUP CHARACTERISTICS
    9.
    发明申请
    CHARGE PUMPS WITH IMPROVED LATCHUP CHARACTERISTICS 有权
    充气泵具有改进的拉力特性

    公开(公告)号:US20130321045A1

    公开(公告)日:2013-12-05

    申请号:US13960141

    申请日:2013-08-06

    Abstract: Some embodiments of the present disclosure relate to improved regulators for charge pumps. Such regulators selectively activate a charge pump based not only on the voltage output of the charge pump, but also on an series of wake-up pulses that are delivered at predetermined time intervals and which are delivered independently of the voltage output of the charge pump. Hence, these wake-up pulses prevent extended periods of time in which the charge pump is inactive, thereby helping to prevent latch-up in some situations.

    Abstract translation: 本公开的一些实施例涉及用于电荷泵的改进的调节器。 这种调节器不仅基于电荷泵的电压输出而且基于以预定的时间间隔传送并且独立于电荷泵的电压输出传送的一系列唤醒脉冲来选择性地激活电荷泵。 因此,这些唤醒脉冲防止电荷泵不活动的延长的时间段,从而有助于在某些情况下防止闩锁。

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