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公开(公告)号:US10134452B2
公开(公告)日:2018-11-20
申请号:US15421475
申请日:2017-02-01
Applicant: Infineon Technologies AG
Inventor: Ulrich Loibl
Abstract: According to one embodiment, a memory arrangement is described a memory including a memory cell and a sense amplifier coupled to the memory cell having a node whose potential depends on the difference between a current through the memory cell and a reference current, a detection circuit configured to generate a signal representing whether the current through the memory cell is above or below the reference current based on the potential of the node and a limitation circuit configured to receive the signal and to limit the change of the potential of the node caused by the difference between the current through the memory cell and the reference current in response to the signal.
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公开(公告)号:US09633733B2
公开(公告)日:2017-04-25
申请号:US14190804
申请日:2014-02-26
Applicant: Infineon Technologies AG
Inventor: Ulrich Loibl , Thomas Kern
IPC: G11C16/10 , G11C11/16 , G11C11/22 , G11C13/00 , G11C14/00 , G11C16/32 , G11C7/08 , G11C16/26 , G11C17/18
CPC classification number: G11C16/107 , G11C7/08 , G11C11/16 , G11C11/1655 , G11C11/1659 , G11C11/1673 , G11C11/2293 , G11C13/0002 , G11C13/004 , G11C13/0061 , G11C14/009 , G11C16/26 , G11C16/32 , G11C17/18
Abstract: A method for data processing is suggested including: (i) transforming electrical variables for each cell of a data bit of a memory into a time domain; and (ii) determining a predetermined state by comparing the transformed electrical variables of at least two data bits.
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公开(公告)号:US10685706B2
公开(公告)日:2020-06-16
申请号:US16273521
申请日:2019-02-12
Applicant: Infineon Technologies AG
Inventor: Ulrich Loibl
Abstract: A sense amplifier circuit is provided for determining a state value of a resistive memory cell, wherein the resistive memory cell comprises a first resistive memory cell element, by means of a second resistive memory cell element, which is part of the resistive memory cell or a memory cell-external reference memory cell element. The sense amplifier circuit can include: a switch structure, a first storage element, a second storage element, and a control circuit. The control circuit controls the switch structure in such a way that in a first phase an electrical voltage present at the first resistive memory cell element or a voltage derived therefrom is fed to the first storage element and an electrical voltage present at the second resistive memory cell element or a voltage derived therefrom is fed to the second storage element. And in a second phase an electrical voltage present at the first resistive memory cell element or a voltage derived therefrom is provided and an electrical voltage present at the second resistive memory cell element or a voltage derived therefrom is provided. An evaluation circuit is configured to determine a state value of the resistive memory cell using the voltages fed to the storage elements in the first phase, or values derived therefrom, and the voltages provided in the second phase, or values derived therefrom.
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公开(公告)号:US20190259451A1
公开(公告)日:2019-08-22
申请号:US16273521
申请日:2019-02-12
Applicant: Infineon Technologies AG
Inventor: Ulrich Loibl
Abstract: A sense amplifier circuit is provided for determining a state value of a resistive memory cell, wherein the resistive memory cell comprises a first resistive memory cell element, by means of a second resistive memory cell element, which is part of the resistive memory cell or a memory cell-external reference memory cell element. The sense amplifier circuit can include: a switch structure, a first storage element, a second storage element, and a control circuit. The control circuit controls the switch structure in such a way that in a first phase an electrical voltage present at the first resistive memory cell element or a voltage derived therefrom is fed to the first storage element and an electrical voltage present at the second resistive memory cell element or a voltage derived therefrom is fed to the second storage element. And in a second phase an electrical voltage present at the first resistive memory cell element or a voltage derived therefrom is provided and an electrical voltage present at the second resistive memory cell element or a voltage derived therefrom is provided. An evaluation circuit is configured to determine a state value of the resistive memory cell using the voltages fed to the storage elements in the first phase, or values derived therefrom, and the voltages provided in the second phase, or values derived therefrom.
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公开(公告)号:US09928909B1
公开(公告)日:2018-03-27
申请号:US15347319
申请日:2016-11-09
Applicant: Infineon Technologies AG
Inventor: Ulrich Loibl
IPC: G11C13/00
CPC classification number: G11C13/0097 , G11C13/004 , G11C13/0069 , G11C2013/0054
Abstract: A circuit having a Resistive Random Access Memory (RRAM) cell coupled between a supply voltage and a sense node; a first transistor coupled between the sense node and a source voltage; and a sub-circuit configured to have a sense voltage at the sense node be lower than a bias voltage at the gate of the first transistor.
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公开(公告)号:US09805771B2
公开(公告)日:2017-10-31
申请号:US14190435
申请日:2014-02-26
Applicant: Infineon Technologies AG
Inventor: Ulrich Loibl , Thomas Kern
CPC classification number: G11C7/06 , G11C7/062 , G11C7/065 , G11C11/16 , G11C11/1659 , G11C11/1673 , G11C11/4091 , G11C13/00 , G11C16/349 , G11C17/00 , G11C29/028 , G11C29/50
Abstract: A method is suggested for determining a state of a cell structure, wherein the cell structure includes several memory cells, the method includes: (i) detecting a first condition in a predetermined number of memory cells; and (ii) determining the state of the cell structure by assigning a second condition to the memory cells that do not show the first condition.
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公开(公告)号:US20150243360A1
公开(公告)日:2015-08-27
申请号:US14190804
申请日:2014-02-26
Applicant: Infineon Technologies AG
Inventor: Ulrich Loibl , Thomas Kern
CPC classification number: G11C16/107 , G11C7/08 , G11C11/16 , G11C11/1655 , G11C11/1659 , G11C11/1673 , G11C11/2293 , G11C13/0002 , G11C13/004 , G11C13/0061 , G11C14/009 , G11C16/26 , G11C16/32 , G11C17/18
Abstract: A method for data processing is suggested including: (i) transforming electrical variables for each cell of a data bit of a memory into a time domain; and (ii) determining a predetermined state by comparing the transformed electrical variables of at least two data bits.
Abstract translation: 提出了一种用于数据处理的方法,包括:(i)将存储器的数据位的每个单元的电变换变换为时域; 和(ii)通过比较至少两个数据位的变换的电变量来确定预定状态。
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公开(公告)号:US20150155777A1
公开(公告)日:2015-06-04
申请号:US14618490
申请日:2015-02-10
Applicant: Infineon Technologies AG
Inventor: Thomas Kern , Ulrich Loibl
IPC: H02M3/07
CPC classification number: H02M3/07 , H02M3/073 , H02M2001/0032 , H02M2003/071 , H03L7/0895 , Y02B70/16
Abstract: Some embodiments of the present disclosure relate to improved regulators for charge pumps. Such regulators selectively activate a charge pump based not only on the voltage output of the charge pump, but also on an series of wake-up pulses that are delivered at predetermined time intervals and which are delivered independently of the voltage output of the charge pump. Hence, these wake-up pulses prevent extended periods of time in which the charge pump is inactive, thereby helping to prevent latch-up in some situations.
Abstract translation: 本公开的一些实施例涉及用于电荷泵的改进的调节器。 这种调节器不仅基于电荷泵的电压输出而且基于以预定的时间间隔传送并且独立于电荷泵的电压输出传送的一系列唤醒脉冲来选择性地激活电荷泵。 因此,这些唤醒脉冲防止电荷泵不活动的延长的时间段,从而有助于在某些情况下防止闩锁。
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公开(公告)号:US20130321045A1
公开(公告)日:2013-12-05
申请号:US13960141
申请日:2013-08-06
Applicant: Infineon Technologies AG
Inventor: Thomas Kern , Ulrich Loibl
CPC classification number: H02M3/07 , H02M3/073 , H02M2001/0032 , H02M2003/071 , H03L7/0895 , Y02B70/16
Abstract: Some embodiments of the present disclosure relate to improved regulators for charge pumps. Such regulators selectively activate a charge pump based not only on the voltage output of the charge pump, but also on an series of wake-up pulses that are delivered at predetermined time intervals and which are delivered independently of the voltage output of the charge pump. Hence, these wake-up pulses prevent extended periods of time in which the charge pump is inactive, thereby helping to prevent latch-up in some situations.
Abstract translation: 本公开的一些实施例涉及用于电荷泵的改进的调节器。 这种调节器不仅基于电荷泵的电压输出而且基于以预定的时间间隔传送并且独立于电荷泵的电压输出传送的一系列唤醒脉冲来选择性地激活电荷泵。 因此,这些唤醒脉冲防止电荷泵不活动的延长的时间段,从而有助于在某些情况下防止闩锁。
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公开(公告)号:US20170270978A1
公开(公告)日:2017-09-21
申请号:US15421475
申请日:2017-02-01
Applicant: Infineon Technologies AG
Inventor: Ulrich Loibl
CPC classification number: G11C7/08 , G11C7/067 , G11C11/1673 , G11C13/004 , G11C16/26 , G11C2013/0045 , G11C2013/0054 , G11C2207/063 , G11C2213/15
Abstract: According to one embodiment, a memory arrangement is described a memory including a memory cell and a sense amplifier coupled to the memory cell having a node whose potential depends on the difference between a current through the memory cell and a reference current, a detection circuit configured to generate a signal representing whether the current through the memory cell is above or below the reference current based on the potential of the node and a limitation circuit configured to receive the signal and to limit the change of the potential of the node caused by the difference between the current through the memory cell and the reference current in response to the signal.
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