NEURAL NETWORK OPERATION SYSTEM
    1.
    发明申请

    公开(公告)号:US20220172035A1

    公开(公告)日:2022-06-02

    申请号:US17310203

    申请日:2019-01-28

    摘要: Disclosed is a neural network operation device, including: an operation array including operation units, wherein each operation unit includes: a source terminal, a drain terminal, a gate electrode, a threshold voltage adjustment layer under the gate electrode, and a channel region extending between a source region and a drain region, the threshold voltage adjustment layer is located on the channel region. The gate electrodes of each column of operation units of the operation array are connected together, and each column is used to adjust a weight value according to a threshold voltage adjusted by the threshold voltage adjustment layer. The threshold voltage adjustment layer is a ferroelectric layer.

    CONDUCTIVE BRIDGE SEMICONDUCTOR COMPONENT AND MANUFACTURING METHOD THEREFOR

    公开(公告)号:US20200066984A1

    公开(公告)日:2020-02-27

    申请号:US16489266

    申请日:2017-02-28

    IPC分类号: H01L45/00

    摘要: The present disclosure provides a conductive bridge semiconductor device and a method of manufacturing the same. The conductive bridge semiconductor device includes a lower electrode, a resistive switching functional layer, an ion barrier layer and an active upper electrode from bottom to top, wherein the ion barrier layer is provided with certain holes through which active conductive ions pass. Based on this structure, the precise designing of the holes on the barrier layer facilitates the modulation of the quantity, size and density of the conduction paths in the conductive bridge semiconductor device, which enables that the conductive bridge semiconductor device can be modulated to be a nonvolatile conductive bridge resistive random access memory or a volatile conductive bridge selector. Based on the above method, ultra-low power nonvolatile conductive bridge memory and high driving-current volatile conductive bridge selector with controllable polarity are completed.

    Three-dimensional Memory Device and Manufacturing Method Thereof

    公开(公告)号:US20170236836A1

    公开(公告)日:2017-08-17

    申请号:US15503833

    申请日:2014-09-25

    IPC分类号: H01L27/11582

    摘要: A method for manufacturing three-dimensional memory, comprising the steps of: forming a stack structure composed of a plurality of first material layers and a plurality of second material layers on a substrate; etching the stack structure to expose the substrate, forming a plurality of first vertical openings; forming a filling layer in each of the first openings; etching the stack structure around each of the first openings to expose the substrate, forming a plurality of second vertical openings; forming a vertical channel layer and a drain in each of the second openings; removing the filling layer by selective etching, re-exposing the first openings; partially or completely removing the second material layers by lateral etching, leaving a plurality of recesses; forming a plurality of gate stack structure in the recesses; forming a plurality of common sources on and/or in the substrate at the bottom of each of the first openings. In accordance with the three-dimensional memory manufacturing method of the present invention, the deep trenches of word-line in the TCAT three-dimensional device are replaced with deep-hole etching to realize the same function, thereby improving the integration density, simplifying the etching process of stacked structure, and maintaining the control performance of the metal gate.

    METHOD FOR IMPLEMENTING LOGIC CALCULATION BASED ON A CROSSBAR ARRAY STRUCTURE OF RESISTIVE SWITCHING DEVICE

    公开(公告)号:US20200335165A1

    公开(公告)日:2020-10-22

    申请号:US16959225

    申请日:2018-01-22

    IPC分类号: G11C13/00 H03K19/20

    摘要: An operation method for integrating logic calculations and data storage based on a crossbar array structure of resistive switching devices. The calculation and storage functions of the method are based on the same hardware architecture, and the data storage is completed while performing calculation, thereby realizing the fusion of calculation and storage. The method includes applying a pulse sequence to a specified word line or bit line by a controller, configuring basic units of resistive switching devices to form different serial-parallel structures, such that three basic logic operations, i.e. NAND, OR, and COPY, are implemented and mutually combined on this basis, thereby implementing 16 types of binary Boolean logic and full addition operations, and on this basis, a method for implementing a parallel logic and full addition operations is provided.

    THREE-TERMINAL ATOMIC SWITCHING DEVICE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20170352806A1

    公开(公告)日:2017-12-07

    申请号:US15539608

    申请日:2014-12-26

    IPC分类号: H01L45/00 H01L27/24

    摘要: There is provided a three-terminal atomic switching device and a method of manufacturing the same, which belongs to the field of microelectronics manufacturing and memory technology. The three-terminal atomic switching device includes: a stack structure including a source terminal and a drain terminal; a vertical trench formed by etching the stack structure; an M8XY6 channel layer formed on an inner wall and a bottom of the vertical trench; and a control terminal formed on a surface of the M8XY6 channel layer, wherein the control terminal fills the vertical trench. The source terminal resistance and the drain terminal resistance are controlled by the control terminal. The invention is based on the three-terminal atomic switching device, and realizes high switching ratio characteristic, simple structure, easy integration, high density and low cost due to high non-linearity of the source-drain resistance with respect to the control terminal voltage, and thus can be used in a gated device in a cross-array structure to inhibit a crosstalk phenomenon caused by the leakage current. The three-terminal atomic switching device proposed by the invention is suitable for a planar stacked cross-array structure and a vertical cross-array structure, so as to realize high-density three-dimensional storage.

    GAS RECOGNITION METHOD BASED ON COMPRESSIVE SENSING THEORY
    8.
    发明申请
    GAS RECOGNITION METHOD BASED ON COMPRESSIVE SENSING THEORY 审中-公开
    基于压缩感知理论的气体识别方法

    公开(公告)号:US20160123943A1

    公开(公告)日:2016-05-05

    申请号:US14895915

    申请日:2013-06-05

    IPC分类号: G01N33/00

    CPC分类号: G01N33/0034 G06N3/084

    摘要: A gas recognition method based on a compressive sensing theory. The method comprises: collecting compressed data in an under-sampling manner; performing a reconstruction on the collected compressed data to obtain reconstructed data; training a back-propagation neural network by using the reconstructed data and storing the trained back-propagation neural network; inputting data under test into the trained back-propagation neural network, such that the trained back-propagation neural network performs a recognition on the data under test to realize qualitative recognition of gas. The method solves the problem in transmission and storage of large amount of data and the problem of imprecise recognition in current gas detection, and achieves the object that a precise qualitative recognition is achieved by using a reduced amount of data.

    摘要翻译: 一种基于压缩感知理论的气体识别方法。 该方法包括:以低采样方式收集压缩数据; 对所收集的压缩数据进行重构以获得重构数据; 通过使用重构数据训练反向传播神经网络,并存储经过训练的反向传播神经网络; 将被测数据输入到经过训练的反向传播神经网络中,使得经过训练的反向传播神经网络对被测数据进行识别,以实现气体的定性识别。 该方法解决了大量数据的传输和存储问题,以及当前气体检测中不精确识别的问题,达到了通过减少数据量实现精确定性识别的对象。

    RANDOM SAMPLER ADAPTED TO ONE-DIMENSION SLOW-VARYING SIGNAL
    9.
    发明申请
    RANDOM SAMPLER ADAPTED TO ONE-DIMENSION SLOW-VARYING SIGNAL 有权
    随机采样器适应于一维慢变信号

    公开(公告)号:US20160079969A1

    公开(公告)日:2016-03-17

    申请号:US14888335

    申请日:2013-07-15

    IPC分类号: H03K4/08

    摘要: A sampler adapted to a one-dimension slow-varying signal, including: a signal preprocessing unit configured to preprocess an input signal; a slope-controllable sawtooth wave signal generating unit configured to generate a slope-controllable sawtooth wave signal and perform zero-resetting; a signal comparing unit configured to compare the preprocessed input signal from the signal preprocessing unit with the sawtooth wave signal and to output a pulse signal to the generating unit and a signal outputting unit when the preprocessed input signal is equal to the sawtooth wave signal; a counting unit configured to count a number of clock signals while the sawtooth wave signal generating unit is generating the sawtooth wave signal and to transmit the counted number to the signal outputting unit; the signal outputting unit configured to, upon receipt of the pulse signal output from the signal comparing unit, output the number counted by the counting unit at the moment.

    摘要翻译: 一种适于一维慢变信号的采样器,包括:信号预处理单元,被配置为预处理输入信号; 坡度可控锯齿波信号产生单元,其被配置为产生斜率可控锯齿波信号并执行零重置; 信号比较单元,被配置为将来自信号预处理单元的预处理输入信号与锯齿波信号进行比较,并且当预处理输入信号等于锯齿波信号时,向生成单元输出脉冲信号和信号输出单元; 计数单元,被配置为在锯齿波信号生成单元产生锯齿波信号的同时对多个时钟信号进行计数,并将计数的数量发送到信号输出单元; 所述信号输出单元被配置为在接收到从所述信号比较单元输出的脉冲信号时,输出由所述计数单元计数的数量。