公开(公告)号：US12013719B2

公开(公告)日：2024-06-18

申请号：US17130982

申请日：2020-12-22

Applicant: Intel Corporation

Inventor： Daniel Ragland ,  Nadav Shulman ,  Louis Draghi

IPC: G06F1/10 ,  G06F1/08 ,  G06F1/20 ,  G06F1/3206 ,  G06F16/9035

CPC classification number: G06F1/10 ,  G06F1/08 ,  G06F1/206 ,  G06F1/3206 ,  G06F16/9035

Abstract: Methods, apparatus, and articles of manufacture to dynamically configure overclocking frequency have been disclosed. An example apparatus include a clock rate adjuster to cause a processor core to operate at a first overclocked clock rate; a comparator to compare a sensed temperature corresponding to the processor core to a threshold; and the clock rate adjuster to, when the sensed temperature satisfies the threshold, decrease a clock rate of the processor core from the first overclocked clock rate by a user-defined amount, the decreased clock rate being above a normal operating clock rate of the processor core.

公开(公告)号：US20220113757A1

公开(公告)日：2022-04-14

申请号：US17558118

申请日：2021-12-21

Applicant: Intel Corporation

Inventor： Jin Yan ,  Hui Xiong ,  Jianfang Zhu ,  Felipe Gonzalez ,  Mark MacDonald ,  Daniel Ragland ,  Rodny Rodriguez ,  Matthew Fife ,  Yifan Li ,  Kristoffer Fleming

IPC: G06F1/08 ,  G06F1/20

Abstract: Apparatus, systems, and methods for intelligent tuning of overclocking frequency are disclosed. An example apparatus includes trial control circuitry to execute an optimization model to select first values for overclocking parameters of a processor, the first values associated with a first trial, and perform benchmark testing of the processor when the processor is operating based on the first values; trial evaluation circuitry to calculate a first score for the first trial based on the benchmark testing; and model updating circuitry to perform a comparison of the first score to a second score, the second score associated with a second trial for second values for the overclocking parameters, the second values different than the first values; and select one of the first values or the second values to overclock the processor based on the comparison.

公开(公告)号：US20240411339A1

公开(公告)日：2024-12-12

申请号：US18659807

申请日：2024-05-09

Applicant: Intel Corporation

Inventor： Daniel Ragland ,  Nadav Shulman ,  Louis Draghi

IPC: G06F1/10 ,  G06F1/08 ,  G06F1/20 ,  G06F1/3206 ,  G06F16/9035

Abstract: Methods, apparatus, and articles of manufacture to dynamically configure overclocking frequency have been disclosed. An example apparatus include a clock rate adjuster to cause a processor core to operate at a first overclocked clock rate; a comparator to compare a sensed temperature corresponding to the processor core to a threshold; and the clock rate adjuster to, when the sensed temperature satisfies the threshold, decrease a clock rate of the processor core from the first overclocked clock rate by a user-defined amount, the decreased clock rate being above a normal operating clock rate of the processor core.

公开(公告)号：US12284793B2

公开(公告)日：2025-04-22

申请号：US17754429

申请日：2020-12-23

Applicant: Intel Corporation

Inventor： Ritu Bawa ,  Ruander Cardenas ,  Kathiravan D ,  Jia Yan Go ,  Chin Kung Goh ,  Jeff Ku ,  Prakash Kurma Raju ,  Baomin Liu ,  Twan Sing Loo ,  Mikko Makinen ,  Columbia Mishra ,  Juha Paavola ,  Prasanna Pichumani ,  Daniel Ragland ,  Kannan Raja ,  Khal Ern See ,  Javed Shaikh ,  Gokul Subramaniam ,  George Baoci Sun ,  Xiyong Tian ,  Hua Yang ,  Mark Carbone ,  Vivek Paranjape ,  Nehakausar Pinjari ,  Hari Shanker Thakur ,  Christopher Moore ,  Gustavo Fricke ,  Justin Huttula ,  Gavin Sung ,  Sammi Wy Liu ,  Arnab Sen ,  Chun-Ting Liu ,  Jason Y. Jiang ,  Gerry Juan ,  Shih Wei Nien ,  Lance Lin ,  Evan Kuklinski

IPC: H05K7/20 ,  G06F1/20 ,  H01L23/34

Abstract: An electronic device comprises a heat source and a heat distribution structure coupled to the heat source to distribute heat generated by the heat source during operation of the electronic device.

公开(公告)号：US20210109562A1

公开(公告)日：2021-04-15

申请号：US17130982

申请日：2020-12-22

Applicant: Intel Corporation

Inventor： Daniel Ragland ,  Nadav Shulman ,  Louis Draghi

IPC: G06F1/10 ,  G06F1/08 ,  G06F1/3206 ,  G06F1/20 ,  G06F16/9035

Abstract: Methods, apparatus, and articles of manufacture to dynamically configure overclocking frequency have been disclosed. An example apparatus include a clock rate adjuster to cause a processor core to operate at a first overclocked clock rate; a comparator to compare a sensed temperature corresponding to the processor core to a threshold; and the clock rate adjuster to, when the sensed temperature satisfies the threshold, decrease a clock rate of the processor core from the first overclocked clock rate by a user-defined amount, the decreased clock rate being above a normal operating clock rate of the processor core.

公开(公告)号：US20200005728A1

公开(公告)日：2020-01-02

申请号：US16019924

申请日：2018-06-27

Applicant: Intel Corporation

Inventor： Nasser Kurd ,  Daniel Ragland ,  Ameya Ambardekar ,  John Fallin ,  Praveen Mosalikanti ,  Vaughn J. Grossnickle

IPC: G09G5/00 ,  H03L7/08 ,  G06F1/04 ,  G06F1/26

Abstract: Techniques and mechanisms for an integrated circuit (IC) chip to generate a clock signal for use by one or more resources of the IC chip. In an embodiment, a clock signal is generated with phase-locked loop (PLL) circuitry of an IC chip based on a cyclical signal which is provided to the IC chip by an external source. A supply voltage provided to the PLL circuitry is automatically updated based on one of a requested frequency for the clock signal, a frequency of the received cyclical signal, or a voltage of a control signal used by a voltage controlled oscillator of the PLL circuitry. In another embodiment, a series of incremental changes to a frequency of the clock signal is automatically performed according to a predefined overclocking scheme or underclocking scheme.