公开(公告)号：US20200161535A1

公开(公告)日：2020-05-21

申请号：US16193599

申请日：2018-11-16

申请人： Intel Corporation

发明人： Chia-Ching LIN ,  Tanay GOSAVI ,  Sasikanth MANIPATRUNI ,  Dmitri NIKONOV ,  Ian YOUNG

IPC分类号： H01L43/02 ,  H01L43/10 ,  H01L27/22 ,  G11C11/16 ,  H01F10/32

摘要： A memory apparatus is provided which comprises: a stack comprising a magnetic insulating material and a transition metal dichalcogenide (TMD), wherein the magnetic insulating material has a first magnetization. The stack behaves as a free magnet. The apparatus includes a fixed magnet with a second magnetization. An interconnect is further provided which comprises a spin orbit material, wherein the interconnect is adjacent to the stack.

公开(公告)号：US20200212291A1

公开(公告)日：2020-07-02

申请号：US16236060

申请日：2018-12-28

申请人： Intel Corporation

发明人： Chia-Ching LIN ,  Sasikanth MANIPATRUNI ,  Tanay GOSAVI ,  Dmitri NIKONOV ,  Kaan OGUZ ,  Ian A. YOUNG

IPC分类号： H01L43/02 ,  H01L43/10 ,  H01L43/12 ,  H01L27/22 ,  H01F10/32 ,  H01L27/11 ,  G11C11/16 ,  G11C11/14

摘要： A memory device comprises an interconnect comprises a spin orbit coupling (SOC) material. A free magnetic layer is on the interconnect, a barrier material is over the free magnetic layer and a fixed magnetic layer is over the barrier material, wherein the free magnetic layer comprises an antiferromagnet. In another embodiment, memory device comprises a spin orbit coupling (SOC) interconnect and an antiferromagnet (AFM) free magnetic layer is on the interconnect. A ferromagnetic magnetic tunnel junction (MTJ) device is on the AFM free magnetic layer, wherein the ferromagnetic MTJ comprises a free magnet layer, a fixed magnet layer, and a barrier material between the free magnet layer and the fixed magnet layer.

公开(公告)号：US20180145691A1

公开(公告)日：2018-05-24

申请号：US15567945

申请日：2015-05-28

申请人： Intel Corporation

发明人： Sasikanth MANIPATRUNI ,  Dmitri NIKONOV ,  Ian A. Young

IPC分类号： H03K19/21 ,  H01L43/08 ,  H03K19/18 ,  H01L43/04

CPC分类号： H03K19/21 ,  H01L43/04 ,  H01L43/08 ,  H03K19/18

摘要： Described is an apparatus which comprises: a first layer formed of a material that exhibits spin orbit torque effect; a second layer formed of material that exhibits spin orbit torque effect; and a magnetic tunneling junction (MTJ) including first and second free magnetic layers, wherein the first free magnetic layer is coupled to the first layer and wherein the second free magnetic layer is coupled to the second layer.

公开(公告)号：US20200212055A1

公开(公告)日：2020-07-02

申请号：US16236047

申请日：2018-12-28

申请人： Intel Corporation

发明人： Chia-Ching LIN ,  Sasikanth MANIPATRUNI ,  Tanay GOSAVI ,  Dmitri NIKONOV ,  Sou-Chi CHANG ,  Uygar E. AVCI ,  Ian A. YOUNG

IPC分类号： H01L27/11507

摘要： A memory device comprises a trench within an insulating layer. A bottom electrode material is along sidewalls and a bottom of the trench, the bottom electrode material conformal to a top surface of the insulating layer. A ferroelectric material is conformal to the bottom electrode. A top electrode material is conformal to the ferroelectric material, wherein the bottom electrode material, the ferroelectric material and the top electrode material all extend above and across the top surface of the insulating layer.

公开(公告)号：US20200006636A1

公开(公告)日：2020-01-02

申请号：US16024709

申请日：2018-06-29

申请人： Intel Corporation

发明人： Tanay GOSAVI ,  Sasikanth MANIPATRUNI ,  Chia-Ching LIN ,  Gary ALLEN ,  Kaan OGUZ ,  Kevin O?BRIEN ,  Noriyuki SATO ,  Ian YOUNG ,  Dmitri NIKONOV

IPC分类号： H01L43/02 ,  H01L27/22 ,  H01L43/12 ,  G11C11/16

摘要： Embodiments herein relate to magnetically doping a spin orbit torque electrode (SOT) in a magnetic random access memory apparatus. In particular, the apparatus may include a free layer of a magnetic tunnel junction (MTJ) coupled to a SOT electrode that is magnetically doped to apply an effective magnetic field on the free layer, where the free layer has a magnetic polarization in a first direction and where current flowing through the magnetically doped SOT electrode is to cause the magnetic polarization of the free layer to change to a second direction that is substantially opposite to the first direction.

公开(公告)号：US20200006627A1

公开(公告)日：2020-01-02

申请号：US16022519

申请日：2018-06-28

申请人： Intel Corporation

发明人： Sasikanth MANIPATRUNI ,  Tanay GOSAVI ,  Ian YOUNG ,  Dmitri NIKONOV

IPC分类号： H01L43/02 ,  H01L27/22 ,  H01L43/10 ,  G11C11/16 ,  H01L43/12

摘要： A memory device comprises a substrate having a front side and a backside, wherein a first conductive line is on the backside and a second conductive line is on the front side. A transistor is on the front side between the second conductive line and the substrate. A magnetic tunnel junction (MTJ) is on the backside between the first conductive line and the substrate, wherein one end of the MTJ is coupled through the substrate to the transistor and an opposite end of the MTJ is connected to the first conductive line, and wherein the transistor is further connected to the second conductive line on the front side.

公开(公告)号：US20190189173A1

公开(公告)日：2019-06-20

申请号：US16326308

申请日：2016-09-30

申请人： INTEL CORPORATION

发明人： Sasikanth MANIPATRUNI ,  Ian YOUNG ,  Dmitri NIKONOV

IPC分类号： G11C11/16 ,  H03K19/16 ,  H01L29/66 ,  H01L29/82 ,  H03K19/18

CPC分类号： G11C11/161 ,  H01L29/66984 ,  H01L29/82 ,  H01L43/06 ,  H03K19/16 ,  H03K19/18

摘要： Methods and apparatus for complex number generation and operation on a chip are disclosed. A disclosed logic device includes a first magnet with a first preferred direction of magnetization to polarize a spin of electrons in the first direction. The example logic device includes a second magnet with a second preferred direction of magnetization that polarizes a spin of electrons in the second direction. The example logic device includes a third magnet providing a free layer without a preferred direction of magnetization that is connected to the first and second magnets, wherein the third magnet encodes a vector based on a flux of electrons spin polarized in the first direction and a flux of electrons spin polarized in the second direction.