公开(公告)号：US20020080584A1

公开(公告)日：2002-06-27

申请号：US09970954

申请日：2001-10-04

Applicant: Intel Corporation.

Inventor： Ravi Prasher ,  Abhay A. Watwe ,  Gregory M. Chrysler ,  Kristopher Frutschy ,  Leo Ofman ,  Ajit V. Sathe

IPC: H05K007/20

CPC classification number: H01L23/427 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Two types of thermal management devices for efficiently dissipating heat generated by high performance electronic devices, such as microprocessors for desktop and server computers producing a power of near 200 Watts and high power electronic devices that are small and thin, such as those used in telephones, radios, laptop computers, and handheld devices. An integrated heat sink and spreader for cooling an item has a vapor chamber heat sink with a thinner first wall and a thicker second wall. The thicker second wall is engageable with the item in efficient heat transferring relationship. A plurality of heat-radiating fins are attached to the thinner first wall. An embedded direct heat pipe attachment includes a heat pipe embedded in a spreader plate that is in direct heat transferring contact with an item through a thin, uniform layer of thermal interface material.

公开(公告)号：US20020065965A1

公开(公告)日：2002-05-30

申请号：US09726629

申请日：2000-11-30

Applicant: Intel Corporation

Inventor： Ajit V. Sathe ,  Paul H. Wermer

IPC: G06F013/00

CPC classification number: H01L23/10 ,  H01L23/055 ,  H01L23/4334 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49866 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81101 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01025 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01R12/57 ,  H05K3/325 ,  H05K7/1061 ,  H05K13/046 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49169 ,  H01L2224/05599

Abstract: To decrease the thickness, or stack height, of an electronics package, the package includes a solderless compression connector between an integrated circuit (IC) package and a substrate such as a printed circuit board (PCB). In one embodiment, the IC package is mounted on the substrate using a land grid array arrangement. Corresponding lands on the IC package and substrate are coupled using a solderless compression connector. The compression connector includes a plurality of electrically conductive elements, such as compressible button contacts, and an apertured support that aligns the button contacts with corresponding lands on the IC package and substrate. In another embodiment, the connector includes electrically conductive pins embedded in a thin plastic sheet. In a further embodiment, the connector includes a microcrystalline film having electrically conductive crystals. In a further embodiment, the compression connector is used within an IC package to couple an IC to an IC package substrate. Methods of fabrication, as well as application of the package to an electronic assembly, an electronic system, and a data processing system, are also described.

Abstract translation: 为了降低电子封装的厚度或堆叠高度，封装在集成电路（IC）封装和诸如印刷电路板（PCB）的基板之间包括无焊压缩连接器。 在一个实施例中，使用平面栅格阵列布置将IC封装安装在基板上。 使用无焊压缩连接器将IC封装和衬底上的对应区域耦合。 压缩连接器包括多个导电元件，诸如可压缩按钮触点，以及有孔支撑件，其将按钮触点与IC封装和基板上的对应的平台对准。 在另一个实施例中，连接器包括嵌入薄塑料片中的导电针。 在另一实施例中，连接器包括具有导电晶体的微晶膜。 在另一实施例中，压缩连接器用于IC封装内以将IC耦合到IC封装基板。 还描述了制造方法以及将包装应用于电子组件，电子系统和数据处理系统。

公开(公告)号：US20030001287A1

公开(公告)日：2003-01-02

申请号：US09893036

申请日：2001-06-27

Applicant: Intel Corporation

Inventor： Ajit V. Sathe

IPC: H01L023/48 ,  H01L023/52 ,  H01L029/40

CPC classification number: H01L23/49811 ,  H01L23/49822 ,  H01L23/4985 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/73204 ,  H01L2924/01087 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K1/112 ,  H05K1/141 ,  H05K3/0097 ,  H05K3/4644

Abstract: To decrease the weight and the thickness, and to increase the flexibility, of an electronics package, the package includes an integrated circuit (IC) mounted on a flexible tape substrate. In one embodiment, an IC is mounted on a flexible tape substrate using a ball grid array arrangement; however, other arrangements, including lead bonding, can be used. The flexible tape substrate can comprise conductive traces, vias, and patterns of lands on one or more layers. Methods of fabrication, as well as application of the flexible tape package to an electronic assembly, an electronic system, and a data processing system, are also described.

Abstract translation: 为了减小重量和厚度并增加电子封装的灵活性，封装包括安装在柔性带基板上的集成电路（IC）。 在一个实施例中，使用球栅阵列布置将IC安装在柔性带基板上; 然而，可以使用包括引线键合在内的其它布置。 柔性带基材可以包括一个或多个层上的导电迹线，通路和焊盘图案。 还描述了制造方法以及将柔性带包装应用于电子组件，电子系统和数据处理系统。