公开(公告)号：US09159683B2

公开(公告)日：2015-10-13

申请号：US14176697

申请日：2014-02-10

Applicant: GLOBALFOUNDRIES Inc. ,  Intermolecular Inc.

Inventor： Reiner Willeke ,  Tanya Atanasova ,  Anh Duong ,  Greg Nowling

IPC: H01L21/44 ,  H01L23/00 ,  H01L21/3213

CPC classification number: H01L24/11 ,  C23F1/02 ,  C23F1/26 ,  C23F1/34 ,  C23F1/44 ,  H01L21/32134 ,  H01L21/32139 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03614 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05647 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11848 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013 ,  H01L2924/014 ,  H01L2924/01082 ,  H01L2924/01047 ,  H01L2924/0103 ,  H01L2924/01083 ,  H01L2924/01049 ,  H01L2924/01079 ,  H01L2924/01029 ,  H01L2924/01051 ,  H01L2924/00011 ,  H01L2924/00012 ,  H01L2924/04953 ,  H01L2924/04941

Abstract: Methods for etching copper in the fabrication of integrated circuits are disclosed. In one exemplary embodiment, a method for fabricating an integrated circuit includes providing an integrated circuit structure including a copper bump structure and a copper seed layer underlying and adjacent to the copper bump structure and etching the seed layer selective to the copper bump structure using a wet etching chemistry consisting of H3PO4 in a volume percentage of about 0.07 to about 0.36, H2O2 in a volume percentage of about 0.1 to about 0.7, and a remainder of H2O, and optionally NH4OH.

Abstract translation: 公开了在制造集成电路中蚀刻铜的方法。 在一个示例性实施例中，一种用于制造集成电路的方法包括提供集成电路结构，该集成电路结构包括铜凸块结构和位于铜凸块结构之下并与铜凸起结构相邻的铜籽晶层，并使用湿法蚀刻对铜凸块结构有选择性的晶种层 以约0.07至约0.36的体积百分比由H 3 PO 4组成的体积百分比为约0.1至约0.7的H 2 O 2，以及剩余的H 2 O和任选的NH 4 OH的蚀刻化学。

公开(公告)号：US20150228595A1

公开(公告)日：2015-08-13

申请号：US14176697

申请日：2014-02-10

Applicant: Intermolecular Inc. ,  GLOBALFOUNDRIES Inc.

Inventor： Reiner Willeke ,  Tanya Atanasova ,  Anh Duong ,  Greg Nowling

IPC: H01L23/00 ,  H01L21/3213

CPC classification number: H01L24/11 ,  C23F1/02 ,  C23F1/26 ,  C23F1/34 ,  C23F1/44 ,  H01L21/32134 ,  H01L21/32139 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03614 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05647 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11848 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013 ,  H01L2924/014 ,  H01L2924/01082 ,  H01L2924/01047 ,  H01L2924/0103 ,  H01L2924/01083 ,  H01L2924/01049 ,  H01L2924/01079 ,  H01L2924/01029 ,  H01L2924/01051 ,  H01L2924/00011 ,  H01L2924/00012 ,  H01L2924/04953 ,  H01L2924/04941

Abstract: Methods for etching copper in the fabrication of integrated circuits are disclosed. In one exemplary embodiment, a method for fabricating an integrated circuit includes providing an integrated circuit structure including a copper bump structure and a copper seed layer underlying and adjacent to the copper bump structure and etching the seed layer selective to the copper bump structure using a wet etching chemistry consisting of H3PO4 in a volume percentage of about 0.07 to about 0.36, H2O2 in a volume percentage of about 0.1 to about 0.7, and a remainder of H2O, and optionally NH4OH.

Abstract translation: 公开了在制造集成电路中蚀刻铜的方法。 在一个示例性实施例中，一种用于制造集成电路的方法包括提供集成电路结构，该集成电路结构包括铜凸块结构和位于铜凸块结构之下并与铜凸起结构相邻的铜籽晶层，并使用湿法蚀刻对铜凸块结构有选择性的晶种层 以约0.07至约0.36的体积百分比由H 3 PO 4组成的体积百分比为约0.1至约0.7的H 2 O 2，以及剩余的H 2 O和任选的NH 4 OH的蚀刻化学。