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公开(公告)号：US20210193576A1
公开(公告)日：2021-06-24
申请号：US17196267
申请日：2021-03-09
发明人： John Bruley , Jack O. Chu , Kam-Leung Lee , Ahmet S. Ozcan , Paul M. Solomon , Jeng-bang Yau
IPC分类号： H01L23/535 , H01L23/532 , H01L29/78 , H01L21/768 , C22C30/00 , H01L23/485 , H01L21/285
摘要： A method of forming a contact to a semiconductor device is provided that forms an alloy composed of nickel (Ni), platinum (Pt), aluminum (Al), titanium (Ti) and a semiconductor material. The methods may include forming a nickel and platinum semiconductor alloy at a base of a via. A titanium layer having an angstrom scale thickness is deposited in the via in contact with the nickel platinum semiconductor alloy. An aluminum containing fill is deposited atop the titanium layer. A forming gas anneal including an oxygen containing atmosphere is applied to the structure to provide a contact alloy comprising nickel, platinum, aluminum, titanium and a semiconductor element from the contact surface of the semiconductor device.
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公开(公告)号：US20180068950A1
公开(公告)日：2018-03-08
申请号：US15257267
申请日：2016-09-06
发明人： John Bruley , Jack O. Chu , Kam-Leung Lee , Ahmet S. Ozcan , Paul M. Solomon , Jeng-bang Yau
IPC分类号： H01L23/535 , H01L23/532 , H01L29/78 , H01L21/768 , C22C30/00
CPC分类号： H01L23/535 , C22C30/00 , H01L21/76805 , H01L21/76846 , H01L21/76864 , H01L21/76895 , H01L23/485 , H01L23/53209 , H01L23/53223 , H01L23/53238 , H01L23/53252 , H01L23/53266 , H01L29/7851
摘要： A method of forming a contact to a semiconductor device is provided that forms an alloy composed of nickel (Ni), platinum (Pt), aluminum (Al), titanium (Ti) and a semiconductor material. The methods may include forming a nickel and platinum semiconductor alloy at a base of a via. A titanium layer having an angstrom scale thickness is deposited in the via in contact with the nickel platinum semiconductor alloy. An aluminum containing fill is deposited atop the titanium layer. A forming gas anneal including an oxygen containing atmosphere is applied to the structure to provide a contact alloy comprising nickel, platinum, aluminum, titanium and a semiconductor element from the contact surface of the semiconductor device.
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公开(公告)号：US11552237B2
公开(公告)日：2023-01-10
申请号：US16997508
申请日：2020-08-19
发明人： Benjamin Wymore , Christian Lavoie , Markus Brink , John Bruley
摘要： A superconducting circuit includes a Josephson junction device including a lower superconducting material layer formed on a substrate and a junction layer formed on the lower superconducting material layer. The superconducting circuit also includes an upper superconducting material layer formed over the junction layer. At least the lower superconducting material layer comprises grains having a size that is larger than a size of the Josephson junction.
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公开(公告)号：US11101219B2
公开(公告)日：2021-08-24
申请号：US16258041
申请日：2019-01-25
发明人： John Bruley , Jack O. Chu , Kam-Leung Lee , Ahmet S. Ozcan , Paul M. Solomon , Jeng-bang Yau
IPC分类号： H01L21/768 , H01L23/535 , H01L23/532 , H01L29/78 , C22C30/00 , H01L23/485 , H01L21/285
摘要： A method of forming a contact to a semiconductor device is provided that forms an alloy composed of nickel (Ni), platinum (Pt), aluminum (Al), titanium (Ti) and a semiconductor material. The methods may include forming a nickel and platinum semiconductor alloy at a base of a via. A titanium layer having an angstrom scale thickness is deposited in the via in contact with the nickel platinum semiconductor alloy. An aluminum containing fill is deposited atop the titanium layer. A forming gas anneal including an oxygen containing atmosphere is applied to the structure to provide a contact alloy comprising nickel, platinum, aluminum, titanium and a semiconductor element from the contact surface of the semiconductor device.
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公开(公告)号：US20190273205A1
公开(公告)日：2019-09-05
申请号：US15911821
申请日：2018-03-05
发明人： Takashi Ando , Eduard A. Cartier , Seyoung Kim , John Bruley
IPC分类号： H01L45/00
摘要： A method is presented for increasing resistance of a resistive random access memory (ReRAM) device. The method includes forming a first electrode, forming an insulating layer over the first electrode, and forming a second electrode over the insulating layer, the second electrode constructed by depositing a stoichiometric oxygen barrier layer and depositing an oxidized conducting layer directly over the stoichiometric oxygen barrier layer to create a high-resistance conductive path between the first and second electrodes of the ReRAM device.
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公开(公告)号：US20190245056A1
公开(公告)日：2019-08-08
申请号：US15886876
申请日：2018-02-02
申请人： International Business Machines Corporation , Centre National De La Recherche Scientifique , Ecole Centrale De Lyon
发明人： John Bruley , Eduard Albert Cartier , Catherine Dubourdieu , Martin Michael Frank , Lucie Mazet , Vijay Narayanan
IPC分类号： H01L29/51 , H01L27/088 , H01L29/66 , H01L49/02
CPC分类号： H01L29/516 , H01L27/088 , H01L28/55 , H01L29/6684
摘要： A circuit and method relating to a ferroelectric region free of extended grain boundaries through a thickness of ferroelectric film. The circuit includes an interlayer insulating film disposed on a semiconductor wafer; a first conductive film disposed on the interlayer insulating film; a ferroelectric film disposed on the first conductive film; a second conductive film disposed on the ferroelectric film; and a ferroelectric region patterned from the ferroelectric film, wherein the ferroelectric region is free of extended grain boundaries through a thickness of the ferroelectric film. The method includes depositing an interlayer insulating film over a semiconductor wafer; depositing a first conductive film over the interlayer insulating film; depositing a ferroelectric film over the first conductive film; depositing a second conductive film over the ferroelectric film; and forming a capacitor by patterning the first conductive film, the second conductive film, and the ferroelectric film.
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公开(公告)号：US20190067198A1
公开(公告)日：2019-02-28
申请号：US16168092
申请日：2018-10-23
发明人： John Bruley , Jack O. Chu , Kam-Leung Lee , Ahmet S. Ozcan , Paul M. Solomon , Jeng-bang Yau
IPC分类号： H01L23/535 , H01L21/768 , C22C30/00 , H01L29/78 , H01L23/532
摘要： A method of forming a contact to a semiconductor device is provided that forms an alloy composed of nickel (Ni), platinum (Pt), aluminum (Al), titanium (Ti) and a semiconductor material. The methods may include forming a nickel and platinum semiconductor alloy at a base of a via. A titanium layer having an angstrom scale thickness is deposited in the via in contact with the nickel platinum semiconductor alloy. An aluminum containing fill is deposited atop the titanium layer. A forming gas anneal including an oxygen containing atmosphere is applied to the structure to provide a contact alloy comprising nickel, platinum, aluminum, titanium and a semiconductor element from the contact surface of the semiconductor device.
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公开(公告)号：US20170309487A1
公开(公告)日：2017-10-26
申请号：US15133656
申请日：2016-04-20
发明人： Takashi Ando , John Bruley , Eduard A. Cartier , Martin M. Frank , Vijay Narayanan , John Rozen
CPC分类号： H01L21/28255 , H01L21/28229 , H01L21/28264 , H01L29/401 , H01L29/41725 , H01L29/517 , H01L29/66522 , H01L29/66545 , H01L29/66795 , H01L29/78 , H01L29/785
摘要： A method of forming a semiconductor device that includes forming a metal oxide material on a III-V semiconductor channel region or a germanium containing channel region; and treating the metal oxide material with an oxidation process. The method may further include depositing of a hafnium containing oxide on the metal oxide material after the oxidation process, and forming a gate conductor atop the hafnium containing oxide. The source and drain regions are on present on opposing sides of the gate structure including the metal oxide material, the hafnium containing oxide and the gate conductor.
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公开(公告)号：US20240334837A1
公开(公告)日：2024-10-03
申请号：US18129219
申请日：2023-03-31
摘要： A magnetic tunnel junction (MTJ) stack structure includes a reference layer; a tunnel barrier; and a free layer that comprises three distinct materials. All of the three distinct materials in the free layer are magnetic material. One of the three distinct materials in the free layer is a C38 structure alloy.
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公开(公告)号：US12048254B2
公开(公告)日：2024-07-23
申请号：US17071528
申请日：2020-10-15
发明人： Vivekananda P. Adiga , Martin O. Sandberg , Jeng-Bang Yau , David L. Rath , John Bruley , Cihan Kurter , Kenneth P. Rodbell , Hongwen Yan
CPC分类号： H10N60/0912 , H10N60/805 , H10N60/83 , H10N60/85
摘要： Devices, systems, methods, and/or computer-implemented methods that can facilitate protection of a substrate in a qubit device using sacrificial material are provided. According to an embodiment, a device can comprise a superconducting lead provided on a pillar of a sacrificial material provided on a substrate. The device can further comprise a collapsed superconducting junction provided on the substrate and coupled to the superconducting lead.
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