公开(公告)号：US06939805B2

公开(公告)日：2005-09-06

申请号：US10253196

申请日：2002-09-24

申请人： Jörn Lützen ,  Barbara Schmidt ,  Stefan Rongen ,  Martin Schrems ,  Daniel Köhler

发明人： Jörn Lützen ,  Barbara Schmidt ,  Stefan Rongen ,  Martin Schrems ,  Daniel Köhler

IPC分类号： C09K13/00 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/461 ,  H01L21/8242

CPC分类号： H01L27/10861 ,  H01L21/3065 ,  H01L27/1087

摘要： To fabricate a trench capacitor in a substrate, a trench is formed in the substrate. The trench has an upper region and a lower region. In the trench, first of all nanocrystallites and/or a seed layer for nanocrystallites are deposited in the upper region and the lower region. Then, the nanocrystallites and/or the seed layer are removed from the upper region of the trench by means of an etching process. The etching parameters of the etching process are selected in such a way that the seed layer and/or the nanocrystallites which are uncovered in the upper region and the lower region are removed only from the upper region. Consequently, an expensive mask layer can be avoided in the lower region of the trench.

摘要翻译： 为了在衬底中制造沟槽电容器，在衬底中形成沟槽。 沟槽具有上部区域和下部区域。 在沟槽中，在上部区域和下部区域中首先沉积纳米晶体和/或纳米晶体的晶种层。 然后，通过蚀刻工艺从沟槽的上部区域去除纳米晶体和/或种子层。 选择蚀刻工艺的蚀刻参数，使得在上部区域和下部区域中未被覆盖的种子层和/或纳米晶体仅从上部区域移除。 因此，可以在沟槽的下部区域避免昂贵的掩模层。

公开(公告)号：US06828192B2

公开(公告)日：2004-12-07

申请号：US10657928

申请日：2003-09-10

申请人： Wolfgang Gustin ,  Ulrike Grüning-Von Schwerin ,  Dietmar Temmler ,  Martin Schrems ,  Stefan Rongen ,  Rudolf Strasser

发明人： Wolfgang Gustin ,  Ulrike Grüning-Von Schwerin ,  Dietmar Temmler ,  Martin Schrems ,  Stefan Rongen ,  Rudolf Strasser

IPC分类号： H01L218242

CPC分类号： H01L27/10867 ,  H01L27/10873

摘要： A trench capacitor is formed in a trench, which is disposed in a substrate. The trench is filled with a conductive trench filling which functions as an inner capacitor electrode. An epitaxial layer is grown on the sidewall of the trench on the substrate. A buried strap is disposed between the conductive trench filling with the second intermediate layer and the epitaxially grown layer. A dopant outdiffusion formed from the buried strap is disposed in the epitaxially grown layer. Through the epitaxially grown layer, the dopant outdiffusion is further removed from a selection transistor disposed beside the trench, as a result of which it is possible to avoid short-channel effects in the selection transistor.

摘要翻译： 在沟槽中形成沟槽电容器，其设置在基板中。 沟槽填充有用作内部电容器电极的导电沟槽填充物。 在衬底上的沟槽的侧壁上生长外延层。 掩埋带设置在填充有第二中间层的导电沟槽和外延生长层之间。 在外延生长层中设置从掩埋带形成的掺杂剂外扩散。 通过外延生长层，从布置在沟槽旁边的选择晶体管进一步去除掺杂剂扩散，结果可以避免选择晶体管中的短沟道效应。

公开(公告)号：US06777303B2

公开(公告)日：2004-08-17

申请号：US10153045

申请日：2002-05-22

申请人： Martin Schrems ,  Anke Krasemann ,  Moritz Haupt ,  Sabine Steck ,  Daniel Köhler

发明人： Martin Schrems ,  Anke Krasemann ,  Moritz Haupt ,  Sabine Steck ,  Daniel Köhler

IPC分类号： H01L2120

CPC分类号： H01L27/10861 ,  H01L29/66181

摘要： A trench capacitor is formed with an insulation collar. After the formation of the trench, firstly an insulating layer is deposited, from which layer the insulation collar will be subsequently formed. Afterward, the trench is partly filled with a sacrificial filling material and a thin patterning layer is deposited thereon. Spacers are formed from that layer and cover the insulating layer in the upper region of the trench. Afterward, the sacrificial filling material and the insulating layer are completely removed in the lower region of the trench. As a result, the insulation collar is produced in the upper region of the trench.

摘要翻译： 沟槽电容器形成有绝缘套环。 在形成沟槽之后，首先沉积绝缘层，从该层将形成绝缘套环。 之后，沟槽部分地填充有牺牲填充材料，并且在其上沉积薄图案层。 间隔由该层形成并覆盖沟槽上部区域中的绝缘层。 之后，牺牲填充材料和绝缘层在沟槽的下部区域被完全去除。 结果，在沟槽的上部区域中产生绝缘套环。

公开(公告)号：US08338898B2

公开(公告)日：2012-12-25

申请号：US11792515

申请日：2005-10-12

申请人： Franz Schrank ,  Martin Schrems

发明人： Franz Schrank ,  Martin Schrems

IPC分类号： H01L29/82

CPC分类号： H04R19/04 ,  H04R7/10 ,  H04R19/005 ,  H04R2307/207

摘要： An MEMS microphone is bonded onto the surface of an IC component containing at least one integrated circuit suitable for the conditioning and processing of the electrical signal supplied by the MEMS microphone. The entire component is simple to produce and has a compact and space-saving construction. Production is accomplished in a simple and reliable manner.

摘要翻译： MEMS麦克风被结合到包含至少一个集成电路的IC组件的表面上，所述集成电路适于调节和处理由MEMS麦克风提供的电信号。 整个组件生产简单，结构紧凑，节省空间。 生产以简单可靠的方式完成。

公开(公告)号：US06989311B2

公开(公告)日：2006-01-24

申请号：US10147544

申请日：2002-05-16

申请人： Martin Schrems ,  Dietmar Temmler ,  Andreas Wich-Glasen

发明人： Martin Schrems ,  Dietmar Temmler ,  Andreas Wich-Glasen

IPC分类号： H01L21/20

CPC分类号： H01L27/10867 ,  H01L21/76897

摘要： The instant invention is a method for fabricating a trench contact to a deep trench capacitor with a polysilicon filling in a trench hole formed in a silicon substrate. An epitaxy process is performed to selectively grow silicon above the polysilicon filling in the trench hole. An opening leading to the polysilicon filling is anisotropically etched into the epitaxially grown silicon. The opening has lateral dimensions that are smaller than those of the polysilicon filling, and the opening is filled with polysilicon.

公开(公告)号：US06828191B1

公开(公告)日：2004-12-07

申请号：US09363277

申请日：1999-07-28

申请人： Kai Wurster ,  Martin Schrems ,  Jürgen Faul ,  Klaus-Dieter Morhard ,  Alexandra Lamprecht ,  Odile Dequiedt

发明人： Kai Wurster ,  Martin Schrems ,  Jürgen Faul ,  Klaus-Dieter Morhard ,  Alexandra Lamprecht ,  Odile Dequiedt

IPC分类号： H01L218242

CPC分类号： H01L27/10861 ,  H01L27/10829

摘要： A trench capacitor, in particular for use in a semiconductor memory cell, has a trench formed in a substrate; an insulation collar formed in an upper region of the trench; an optional buried plate in the substrate region serving as a first capacitor plate; a dielectric layer lining the lower region of the trench and the insulation collar as a capacitor dielectric; a conductive second filling material filled into the trench as a second capacitor plate; and a buried contact underneath the surface of the substrate. The substrate has, underneath its surface in the region of the buried contact, a doped region introduced by implantation, plasma doping and/or vapor phase deposition. A tunnel layer, in particular an oxide, nitride or oxinitride layer, is preferably formed at the interface of the buried contact. A method for producing a trench capacitor is also provided.

摘要翻译： 特别是在半导体存储单元中使用的沟槽电容器具有形成在衬底中的沟槽; 形成在所述沟槽的上部区域中的绝缘套环; 在作为第一电容器板的基板区域中的可选掩埋板; 衬在沟槽的下部区域的绝缘层和作为电容器电介质的绝缘套管; 作为第二电容器板填充到所述沟槽中的导电的第二填充材料; 以及在衬底的表面下方的埋入接触。 衬底在其掩埋接触区域的表面下方具有通过注入，等离子体掺杂和/或气相沉积引入的掺杂区域。 隧道层，特别是氧化物，氮化物或氮氧化物层优选形成在埋入触点的界面处。 还提供了一种制造沟槽电容器的方法。

公开(公告)号：US06664167B2

公开(公告)日：2003-12-16

申请号：US10085940

申请日：2002-02-28

申请人： Dietmar Temmler ,  Herbert Benzinger ,  Wolfram Karcher ,  Catharina Pusch ,  Martin Schrems ,  Jürgen Faul

发明人： Dietmar Temmler ,  Herbert Benzinger ,  Wolfram Karcher ,  Catharina Pusch ,  Martin Schrems ,  Jürgen Faul

IPC分类号： H01L2120

CPC分类号： H01L27/10861 ,  H01L27/10832

摘要： A memory having a memory cell formed in a substrate and including a trench capacitor and a transistor and a method for producing the memory includes connecting the trench capacitor to the transistor with a self-aligned connection. The transistor at least partly covers the trench capacitor. The trench capacitor is filled with a conductive trench filling and an insulating covering layer is situated on the conductive trench filling. An epitaxial layer is situated above the insulating covering layer. The transistor is formed in the epitaxial layer. The self-aligned connection is formed in a contact trench and includes an insulation collar in which a conductive material is introduced. A conductive cap is formed on the conductive material.

公开(公告)号：US06465370B1

公开(公告)日：2002-10-15

申请号：US09105633

申请日：1998-06-26

申请人： Martin Schrems ,  Rolf-Peter Vollertsen ,  Joachim Hoepfner

发明人： Martin Schrems ,  Rolf-Peter Vollertsen ,  Joachim Hoepfner

IPC分类号： H01L21469

CPC分类号： H01L27/10861 ,  H01L21/3003 ,  H01L29/66181 ,  H01L2924/0002 ,  Y10S438/918 ,  H01L2924/00

摘要： A method for reducing a capacitance formed on a silicon substrate includes the step of introducing hydrogen atoms into a portion of said surface to increase the dielectric constant of such portion of the surface increasing the effective thickness of the dielectric material and hence reducing said capacitance. The method includes the step of forming the silicon dioxide layer with a thickness greater than two nanometers. The step of introducing hydrogen includes forming hydrogen atoms in the surface with concentrations of 1017 atoms per cubic centimeter, or greater. In one embodiment the hydrogen atoms are introduced by baking in hydrogen at a temperature of 950° C. to 1100° C. and pressure greater than 100 Torr. A trench capacitor DRAM cell is provided wherein the hydrogen provides a passivation layer to increase the effective capacitance around a collar region and thereby reduce unwanted transistor action.

摘要翻译： 减少形成在硅衬底上的电容的方法包括将氢原子引入所述表面的一部分以增加表面部分的介电常数增加介电材料的有效厚度从而减小所述电容的步骤。 该方法包括形成厚度大于2纳米的二氧化硅层的步骤。 引入氢的步骤包括在表面上形成浓度为1017原子/立方厘米或更大的氢原子。 在一个实施方案中，氢原子通过在氢气中在950℃至1100℃的温度和大于100托的压力下进行烘烤而引入。 提供了一种沟槽电容器DRAM单元，其中氢提供钝化层以增加环绕区域周围的有效电容，从而减少不需要的晶体管作用。

公开(公告)号：US06265741B1

公开(公告)日：2001-07-24

申请号：US09056119

申请日：1998-04-06

申请人： Martin Schrems

发明人： Martin Schrems

IPC分类号： H01L27108

CPC分类号： H01L27/10861 ,  H01L29/945

摘要： A trench capacitor with an epitaxial layer in the lower portion of the trench. The epitaxial layer may be doped to serve as a buried plate.

摘要翻译： 沟槽电容器，其在沟槽的下部具有外延层。 外延层可以被掺杂以用作掩埋板。

公开(公告)号：US20100314762A1

公开(公告)日：2010-12-16

申请号：US12670303

申请日：2008-07-23

申请人： Franz Schrank ,  Martin Schrems ,  Jochen Kraft

发明人： Franz Schrank ,  Martin Schrems ,  Jochen Kraft

IPC分类号： H01L23/48 ,  H01L23/488 ,  H01L21/768 ,  H01L21/50

CPC分类号： H01L21/76898 ,  H01L21/6836 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/94 ,  H01L2221/6834 ,  H01L2221/68372 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/16 ,  H01L2224/94 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2924/3011 ,  H01L2224/11 ,  H01L2924/00014

摘要： The interlayer connection of the substrate is formed by a contact-hole filling (4) of a semiconductor layer (11) and metallization (17) of a recess (16) in a reverse-side semiconductor layer (13), wherein the semiconductor layers are separated from each other by a buried insulation layer (12), at whose layer position the contact-hole filling or the metallization ends.

摘要翻译： 衬底的层间连接通过半导体层（11）的接触孔填充（4）和反向半导体层（13）中的凹部（16）的金属化（17）形成，其中半导体层 通过掩埋绝缘层（12）彼此分离，在其层位置，接触孔填充或金属化结束。