公开(公告)号：US20080197467A1

公开(公告)日：2008-08-21

申请号：US11898612

申请日：2007-09-13

申请人： J.B. Chyi ,  Cheng Tang Huang

发明人： J.B. Chyi ,  Cheng Tang Huang

IPC分类号： H01L23/495 ,  H01L21/44

CPC分类号： H01L24/11 ,  H01L24/12 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05572 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/114 ,  H01L2224/1147 ,  H01L2224/1148 ,  H01L2224/116 ,  H01L2224/13007 ,  H01L2224/13144 ,  H01L2224/1357 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/013

摘要： A conductive structure for a semiconductor integrated circuit and method for forming the conductive structure are provided. The semiconductor integrated circuit has a pad and a passivation layer partially covering the pad to define a first opening portion having a first lateral size. The conductive structure electrically connects to the pad via the first opening portion. The conductive structure comprises a support layer defining a second opening portion. A conductor is formed in the second opening portion to serve as a bump having a planar top surface.

摘要翻译： 提供了一种用于半导体集成电路的导电结构和用于形成导电结构的方法。 半导体集成电路具有焊盘和钝化层，其部分地覆盖焊盘以限定具有第一横向尺寸的第一开口部分。 导电结构经由第一开口部分电连接到焊盘。 导电结构包括限定第二开口部分的支撑层。 导体形成在第二开口部分中以用作具有平坦顶表面的凸块。

公开(公告)号：US07656020B2

公开(公告)日：2010-02-02

申请号：US11822113

申请日：2007-07-02

申请人： Cheng Tang Huang

发明人： Cheng Tang Huang

IPC分类号： H01L23/488 ,  H01L23/495

CPC分类号： H01L24/11 ,  H01L23/525 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/013

摘要： A packaging conductive structure for a semiconductor substrate and a method for forming the structure are provided. The dielectric layer of the packaging conductive structure partially overlays the metallic layer of the semiconductor substrate and has a receiving space. The lifting layer and conductive layer are formed in the receiving space, wherein the conductive layer extends for connection to a bump. The lifting layer is partially connected to the dielectric layer. As a result, the conductive layer can be stably deposited on the edge of the dielectric layer for enhancing the reliability of the packaging conductive structure.

摘要翻译： 提供了一种用于半导体衬底的封装导电结构以及用于形成该结构的方法。 包装导电结构的电介质层部分覆盖半导体衬底的金属层并具有接收空间。 提升层和导电层形成在接收空间中，其中导电层延伸以连接到凸块。 提升层部分连接到电介质层。 结果，导电层可以稳定地沉积在电介质层的边缘上，以提高封装导电结构的可靠性。

公开(公告)号：US08274150B2

公开(公告)日：2012-09-25

申请号：US13104597

申请日：2011-05-10

申请人： Cheng Tang Huang

发明人： Cheng Tang Huang

IPC分类号： H01L23/48

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L2224/0239 ,  H01L2224/03462 ,  H01L2224/03916 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/05655 ,  H01L2224/10125 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11622 ,  H01L2224/11849 ,  H01L2224/11903 ,  H01L2224/13005 ,  H01L2224/13007 ,  H01L2224/13008 ,  H01L2224/13017 ,  H01L2224/1308 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13155 ,  H01L2224/1319 ,  H01L2224/13566 ,  H01L2924/0002 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/01082 ,  H01L2924/01047 ,  H01L2924/206 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/00012 ,  H01L2224/05552

摘要： A chip bump structure is formed on a substrate. The substrate includes at least one contact pad and a dielectric layer. The dielectric layer has at least one opening. The at least one opening exposes the at least one contact pad. The chip bump structure includes at least one elastic bump, at least one first metal layer, at least one second metal layer, and at least one solder ball. The at least one elastic bump covers a central portion of the at least one contact pad. The at least one first metal layer covers the at least one elastic bump. The at least one first metal layer has a portion of the at least one contact pad. The portion of the at least one contact pad is not overlaid by the at least one elastic bump. The at least one second metal layer is formed on a portion of the at least one first metal layer. The portion of the at least one first metal layer is located on the top of the at least one elastic bump. The at least one solder ball is formed on the at least one second metal layer. The at least one solder ball is also on the top of the at least one elastic bump.

摘要翻译： 在基板上形成芯片凸块结构。 衬底包括至少一个接触焊盘和介电层。 电介质层具有至少一个开口。 所述至少一个开口暴露所述至少一个接触垫。 芯片凸块结构包括至少一个弹性凸块，至少一个第一金属层，至少一个第二金属层和至少一个焊球。 所述至少一个弹性凸块覆盖所述至少一个接触垫的中心部分。 所述至少一个第一金属层覆盖所述至少一个弹性凸块。 所述至少一个第一金属层具有所述至少一个接触垫的一部分。 至少一个接触垫的部分不被至少一个弹性凸块覆盖。 所述至少一个第二金属层形成在所述至少一个第一金属层的一部分上。 所述至少一个第一金属层的所述部分位于所述至少一个弹性凸块的顶部上。 所述至少一个焊球形成在所述至少一个第二金属层上。 所述至少一个焊球也位于所述至少一个弹性凸块的顶部。

公开(公告)号：US20080197475A1

公开(公告)日：2008-08-21

申请号：US11822113

申请日：2007-07-02

申请人： Cheng Tang Huang

发明人： Cheng Tang Huang

IPC分类号： H01L23/488

CPC分类号： H01L24/11 ,  H01L23/525 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/013

摘要： A packaging conductive structure for a semiconductor substrate and a method for forming the structure are provided. The dielectric layer of the packaging conductive structure partially overlays the metallic layer of the semiconductor substrate and has a receiving space. The lifting layer and conductive layer are formed in the receiving space, wherein the conductive layer extends for connection to a bump. The lifting layer is partially connected to the dielectric layer. As a result, the conductive layer can be stably deposited on the edge of the dielectric layer for enhancing the reliability of the packaging conductive structure.

摘要翻译： 提供了一种用于半导体衬底的封装导电结构以及用于形成该结构的方法。 包装导电结构的电介质层部分覆盖半导体衬底的金属层并具有接收空间。 提升层和导电层形成在接收空间中，其中导电层延伸以连接到凸块。 提升层部分连接到电介质层。 结果，导电层可以稳定地沉积在电介质层的边缘上，以提高封装导电结构的可靠性。

公开(公告)号：US08319337B2

公开(公告)日：2012-11-27

申请号：US11898612

申请日：2007-09-13

申请人： Chung-Pang Chi ,  Cheng Tang Huang

发明人： Chung-Pang Chi ,  Cheng Tang Huang

IPC分类号： H01L23/48

CPC分类号： H01L24/11 ,  H01L24/12 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05572 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/114 ,  H01L2224/1147 ,  H01L2224/1148 ,  H01L2224/116 ,  H01L2224/13007 ,  H01L2224/13144 ,  H01L2224/1357 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/013

摘要： A conductive structure for a semiconductor integrated circuit and method for forming the conductive structure are provided. The semiconductor integrated circuit has a pad and a passivation layer partially covering the pad to define a first opening portion having a first lateral size. The conductive structure electrically connects to the pad via the first opening portion. The conductive structure comprises a support layer defining a second opening portion. A conductor is formed in the second opening portion to serve as a bump having a planar top surface.

摘要翻译： 提供了一种用于半导体集成电路的导电结构和用于形成导电结构的方法。 半导体集成电路具有焊盘和钝化层，其部分地覆盖焊盘以限定具有第一横向尺寸的第一开口部分。 导电结构经由第一开口部分电连接到焊盘。 导电结构包括限定第二开口部分的支撑层。 导体形成在第二开口部分中以用作具有平坦顶表面的凸块。

公开(公告)号：US07879651B2

公开(公告)日：2011-02-01

申请号：US12546217

申请日：2009-08-24

申请人： Cheng Tang Huang

发明人： Cheng Tang Huang

IPC分类号： H01L21/00

CPC分类号： H01L24/11 ,  H01L23/525 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/013

摘要： A packaging conductive structure for a semiconductor substrate and a method for forming the structure are provided. The dielectric layer of the packaging conductive structure partially overlays the metallic layer of the semiconductor substrate and has a receiving space. The lifting layer and conductive layer are formed in the receiving space, wherein the conductive layer extends for connection to a bump. The lifting layer is partially connected to the dielectric layer. As a result, the conductive layer can be stably deposited on the edge of the dielectric layer for enhancing the reliability of the packaging conductive structure.

摘要翻译： 提供了一种用于半导体衬底的封装导电结构以及用于形成该结构的方法。 包装导电结构的电介质层部分覆盖半导体衬底的金属层并具有接收空间。 提升层和导电层形成在接收空间中，其中导电层延伸以连接到凸块。 提升层部分连接到电介质层。 结果，导电层可以稳定地沉积在电介质层的边缘上，以提高封装导电结构的可靠性。