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    Semiconductor memory device for simultaneously programming plurality of banks
    2.
    发明申请
    Semiconductor memory device for simultaneously programming plurality of banks 审中-公开
    用于同时编程多个存储体的半导体存储器件

    公开(公告)号：US20090055579A1

    公开(公告)日：2009-02-26

    申请号：US12230142

    申请日：2008-08-25

    Applicant: June-hong Park ,  Jae-yong Jeong ,  Chi-weon Yoon

    Inventor： June-hong Park ,  Jae-yong Jeong ,  Chi-weon Yoon

    IPC: G06F12/02

    CPC classification number: G06F12/0246 ,  G06F2212/7202 ,  G11C11/5628 ,  G11C16/10 ,  G11C2216/14

    Abstract: Provided is a semiconductor memory device for simultaneously programming a plurality of banks. The semiconductor memory device includes: a memory cell array comprising a plurality of banks; a plurality of data buffers storing a plurality of pieces of program data to be programmed in the corresponding banks; and a plurality of scan latches configured to scan the plurality of program data transmitted from the corresponding data buffers, and configured to generate 1st through n−1th sub program data, n being a natural number greater than 2.

    Abstract translation: 提供了一种用于同时编程多个存储体的半导体存储器件。 半导体存储器件包括：包括多个存储体的存储单元阵列; 多个数据缓冲器，存储要在对应的存储体中编程的多个程序数据; 以及多个扫描锁存器，被配置为扫描从相应的数据缓冲器发送的多个节目数据，并且被配置为生成第1到第n个第1个子节目数据，n是大于2的自然数。

    Nonvolatile memory device and method of improving programming characteristic
    3.
    发明申请
    Nonvolatile memory device and method of improving programming characteristic 失效
    非易失性存储器件和改进编程特性的方法

    公开(公告)号：US20060087889A1

    公开(公告)日：2006-04-27

    申请号：US11133286

    申请日：2005-05-20

    Applicant: Jae-yong Jeong

    Inventor： Jae-yong Jeong

    IPC: G11C16/04

    CPC classification number: G11C16/102 ,  G11C16/30

    Abstract: A method of programming a non-volatile memory device includes activating a first pump to generate a bitline voltage, and after the bulk voltage reaches a target voltage, detecting whether the bitline voltage is less than a detection voltage. When the bitline voltage is less than the detection voltage, a second pump becomes active.

    Abstract translation: 一种编程非易失性存储器件的方法包括激活第一泵以产生位线电压，并且在体电压达到目标电压之后，检测位线电压是否小于检测电压。 当位线电压小于检测电压时，第二个泵变为有效。

    Nonvolatile memory devices capable of reducing data programming time and methods of driving the same
    6.
    发明申请
    Nonvolatile memory devices capable of reducing data programming time and methods of driving the same 失效
    能够减少数据编程时间的非易失性存储器件及其驱动方法

    公开(公告)号：US20080192540A1

    公开(公告)日：2008-08-14

    申请号：US12005366

    申请日：2007-12-27

    Applicant: Jae-Phil Kong ,  Heung-soo Lim ,  Jae-yong Jeong ,  Chi-weon Yoon

    Inventor： Jae-Phil Kong ,  Heung-soo Lim ,  Jae-yong Jeong ,  Chi-weon Yoon

    IPC: G11C16/10

    CPC classification number: G11C11/5628

    Abstract: In a method of driving a nonvolatile memory device a first data state is determined from among the plurality of data states. The number of simultaneously programmed bits is set according to the determined first data state and a scanning operation is performed on data input from an external device to search data bits to be programmed. The searched data bits are programmed in response to the number of simultaneously programmed bits. The number of simultaneously programmed bits corresponding to the first data state is different from a number of simultaneously programmed bits corresponding to at least a second of the plurality of data states.

    Abstract translation: 在驱动非易失性存储器件的方法中，从多个数据状态中确定第一数据状态。 根据确定的第一数据状态来设置同时编程的位的数量，并且对从外部设备输入的数据执行扫描操作以搜索要编程的数据位。 搜索到的数据位被编程为响应于同时编程的位的数量。 对应于第一数据状态的同时被编程的位的数量与对应于多个数据状态中的至少一个数据状态的同时被编程的位的数量不同。

    Nonvolatile memory device and method of improving programming characteristic
    7.
    发明授权
    Nonvolatile memory device and method of improving programming characteristic 失效
    非易失性存储器件和改进编程特性的方法

    公开(公告)号：US07239554B2

    公开(公告)日：2007-07-03

    申请号：US11133286

    申请日：2005-05-20

    Applicant: Jae-yong Jeong

    Inventor： Jae-yong Jeong

    IPC: G11C16/04 ,  G11C16/06 ,  G11C7/06 ,  G11C5/14 ,  G11C7/02

    CPC classification number: G11C16/102 ,  G11C16/30

    Abstract: A method of programming a non-volatile memory device includes activating a first pump to generate a bitline voltage, and after the bulk voltage reaches a target voltage, detecting whether the bitline voltage is less than a detection voltage. When the bitline voltage is less than the detection voltage, a second pump becomes active.

    Abstract translation: 一种编程非易失性存储器件的方法包括激活第一泵以产生位线电压，并且在体电压达到目标电压之后，检测位线电压是否小于检测电压。 当位线电压小于检测电压时，第二个泵变为有效。

    Flash memory device having a verify data buffer capable of being employed as a program data buffer, and a method thereof
    9.
    发明授权
    Flash memory device having a verify data buffer capable of being employed as a program data buffer, and a method thereof 有权
    具有能够被用作程序数据缓冲器的验证数据缓冲器的闪速存储器件及其方法

    公开(公告)号：US07782680B2

    公开(公告)日：2010-08-24

    申请号：US12003589

    申请日：2007-12-28

    Applicant: Kee-ho Jung ,  Jae-yong Jeong ,  Chi-weon Yoon

    Inventor： Kee-ho Jung ,  Jae-yong Jeong ,  Chi-weon Yoon

    IPC: G11C11/34

    CPC classification number: G11C16/3454

    Abstract: A flash memory device includes a program data buffer configured to buffer program data to be programmed in a memory cell array, and a verify data buffer configured to compare verify data to confirm whether the program data is accurately programmed in the memory cell array, wherein at least a portion of the verify data buffer is selectively enabled as a verify data buffer or a program data buffer responsive to a buffer control signal.

    Abstract translation: 闪速存储器件包括被配置为缓冲要在存储器单元阵列中编程的程序数据的程序数据缓冲器，以及配置为比较验证数据以确认程序数据是否被精确地编程在存储单元阵列中的校验数据缓冲器，其中， 验证数据缓冲器的至少一部分被有选择地启用为响应于缓冲器控制信号的验证数据缓冲器或程序数据缓冲器。

    Method of erasing data in flash memory device
    10.
    发明申请
    Method of erasing data in flash memory device 失效
    擦除闪存设备中数据的方法

    公开(公告)号：US20100118613A1

    公开(公告)日：2010-05-13

    申请号：US12458502

    申请日：2009-07-14

    Applicant: Jin-young Chun ,  Jae-yong Jeong

    Inventor： Jin-young Chun ,  Jae-yong Jeong

    IPC: G11C16/14 ,  G11C16/04 ,  G11C29/00 ,  G11C16/06

    CPC classification number: G11C16/16 ,  G11C16/344 ,  G11C16/3445

    Abstract: A method of erasing data in a flash memory device, including erasing data in at least one flash memory cell using a first erase voltage; detecting whether the at least one flash memory cell has a threshold voltage less than a first voltage; programming the at least one flash memory cell by varying the threshold voltage of the at least one flash memory cell using a second voltage that is greater than the first voltage if the detecting step detects the threshold voltage is less than the first voltage; maintaining the threshold voltage of the at least one flash memory cell if the detecting step detects the threshold voltage is greater than the first voltage; and verifying the at least one flash memory cell using a first verification voltage.

    Abstract translation: 一种擦除闪速存储器件中的数据的方法，包括使用第一擦除电压擦除至少一个闪存单元中的数据; 检测所述至少一个闪存单元是否具有小于第一电压的阈值电压; 如果所述检测步骤检测到所述阈值电压小于所述第一电压，则使用大于所述第一电压的第二电压改变所述至少一个闪存单元的阈值电压来对所述至少一个闪存单元进行编程; 如果所述检测步骤检测到所述阈值电压大于所述第一电压，则保持所述至少一个闪存单元的阈值电压; 以及使用第一验证电压验证所述至少一个闪存单元。

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