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    Method of making relaxed silicon-germanium on glass via layer transfer
    1.
    发明授权
    Method of making relaxed silicon-germanium on glass via layer transfer 失效
    通过层转移在玻璃上制备松弛的硅 - 锗的方法

    公开(公告)号：US06852652B1

    公开(公告)日：2005-02-08

    申请号：US10674369

    申请日：2003-09-29

    申请人： Jer-Shen Maa ,  Jong-Jan Lee ,  Douglas J. Tweet ,  Steve Roy Droes

    发明人： Jer-Shen Maa ,  Jong-Jan Lee ,  Douglas J. Tweet ,  Steve Roy Droes

    IPC分类号： C23C14/48 ,  H01L21/00 ,  H01L21/02 ,  H01L21/20 ,  H01L21/336 ,  H01L21/762 ,  H01L27/12 ,  H01L29/786

    CPC分类号： H01L21/76254 ,  Y10S438/933

    摘要： A method of forming a silicon-germanium layer on an insulator includes preparing a silicon substrate; depositing a layer of silicon-germanium on the silicon substrate to form a silicon/silicon-germanium portion; implanting hydrogen ions in the silicon-germanium layer; preparing an insulator substrate; bonding the silicon/silicon-germanium portion to the insulator substrate with the silicon-germanium layer in contact with the insulator substrate to form a bonded entity; curing the bonded entity; and thermally annealing the bonded entity to split the bonded entity into a silicon/silicon germanium portion and a silicon-germanium-on-insulator portion and to relax the silicon germanium layers.

    摘要翻译： 在绝缘体上形成硅 - 锗层的方法包括制备硅衬底; 在硅衬底上沉积一层硅 - 锗以形成硅/硅 - 锗部分; 在硅 - 锗层中注入氢离子; 制备绝缘体基板; 将硅/锗锗部分接合到绝缘体衬底，硅 - 锗层与绝缘体衬底接触以形成键合实体; 养护保税实体; 以及对所述结合的实体进行热退火以将所述结合的实体分裂成硅/硅锗部分和绝缘体上的硅 - 锗部分并使所述硅锗层松弛。

    Germanium phototransistor with floating body
    2.
    发明授权
    Germanium phototransistor with floating body 有权
    具有浮体的锗光电晶体管

    公开(公告)号：US07675056B2

    公开(公告)日：2010-03-09

    申请号：US11891574

    申请日：2007-08-10

    申请人： Jong-Jan Lee ,  Sheng Teng Hsu ,  Jer-Shen Maa ,  Douglas J. Tweet

    发明人： Jong-Jan Lee ,  Sheng Teng Hsu ,  Jer-Shen Maa ,  Douglas J. Tweet

    IPC分类号： H01L29/06 ,  H01L31/072 ,  H01L31/109 ,  H01L31/0328 ,  H01L31/062 ,  H01L31/113 ,  H01L31/0232

    CPC分类号： H01L31/1136 ,  H01L31/028 ,  H01L31/1808 ,  Y02E10/547

    摘要： A floating body germanium (Ge) phototransistor and associated fabrication process are presented. The method includes: providing a silicon (Si) substrate; selectively forming an insulator layer overlying the Si substrate; forming an epitaxial Ge layer overlying the insulator layer using a liquid phase epitaxy (LPE) process; forming a channel region in the Ge layer; forming a gate dielectric, gate electrode, and gate spacers overlying the channel region; and, forming source/drain regions in the Ge layer. The LPE process involves encapsulating the Ge with materials having a melting temperature greater than a first temperature, and melting the Ge using a temperature lower than the first temperature. The LPE process includes: forming a dielectric layer overlying deposited Ge; melting the Ge; and, in response to cooling the Ge, laterally propagating an epitaxial growth front into the Ge from an underlying Si substrate surface.

    摘要翻译： 提出了一种浮体锗（Ge）光电晶体管及其制造工艺。 该方法包括：提供硅（Si）衬底; 选择性地形成覆盖Si衬底的绝缘体层; 使用液相外延（LPE）工艺形成覆盖绝缘体层的外延Ge层; 在Ge层中形成沟道区; 形成覆盖所述沟道区的栅极电介质，栅电极和栅极间隔; 并且在Ge层中形成源/漏区。 LPE工艺包括用具有大于第一温度的熔化温度的材料包封Ge，并且使用低于第一温度的温度来熔化Ge。 LPE工艺包括：形成覆盖沉积Ge的介电层; 融化Ge; 并且响应于冷却Ge，将外延生长前沿从下面的Si衬底表面横向传播到Ge中。

    Floating body germanium phototransistor having a photo absorption threshold bias region
    3.
    发明授权
    Floating body germanium phototransistor having a photo absorption threshold bias region 有权
    具有光吸收阈值偏置区域的浮体锗光电晶体管

    公开(公告)号：US07351995B2

    公开(公告)日：2008-04-01

    申请号：US11894938

    申请日：2007-08-22

    申请人： Sheng Teng Hsu ,  Jong-Jan Lee ,  Jer-Shen Maa ,  Douglas J. Tweet

    发明人： Sheng Teng Hsu ,  Jong-Jan Lee ,  Jer-Shen Maa ,  Douglas J. Tweet

    IPC分类号： H01L29/06 ,  H01L31/072 ,  H01L31/109 ,  H01L31/0328 ,  H01L31/062 ,  H01L31/113 ,  H01L31/0232

    CPC分类号： H01L31/1136

    摘要： A floating body germanium (Ge) phototransistor with a photo absorption threshold bias region, and an associated fabrication process are presented. The method includes: providing a p-doped Silicon (Si) substrate; selectively forming an insulator layer overlying a first surface of the Si substrate; forming an epitaxial Ge layer overlying the insulator layer; forming a channel region in the Ge layer; forming a gate dielectric, gate electrode, and gate spacers; forming source/drain (S/D) regions in the Ge layer; and, forming a photo absorption threshold bias region in the Ge layer, adjacent the channel region. In one aspect, the second S/D region has a length, longer than the first S/D length. The photo absorption threshold bias region underlies the second S/D region. Alternately, the second S/D region is separated from the channel by an offset, and the photo absorption threshold bias region is the offset in the Ge layer, after a light p-doping.

    摘要翻译： 提出了具有光吸收阈值偏置区域的浮体锗（Ge）光电晶体管，以及相关的制造工艺。 该方法包括：提供p掺杂硅（Si）衬底; 选择性地形成覆盖在所述Si衬底的第一表面上的绝缘体层; 形成覆盖绝缘体层的外延Ge层; 在Ge层中形成沟道区; 形成栅极电介质，栅电极和栅极间隔物; 在Ge层中形成源极/漏极（S / D）区域; 并且在Ge层中形成邻近沟道区的光吸收阈值偏置区域。 在一个方面，第二S / D区域具有比第一S / D长度更长的长度。 光吸收阈值偏置区域位于第二S / D区域的下方。 或者，第二S / D区域与沟道分离偏移，光吸收阈值偏置区域是在光p掺杂之后的Ge层中的偏移。

    Molecular hydrogen implantation method for forming a relaxed silicon germanium layer with high germanium content
    4.
    发明授权
    Molecular hydrogen implantation method for forming a relaxed silicon germanium layer with high germanium content 失效
    用于形成具有高锗含量的松弛硅锗层的分子氢注入方法

    公开(公告)号：US06562703B1

    公开(公告)日：2003-05-13

    申请号：US10099374

    申请日：2002-03-13

    申请人： Jer-Shen Maa ,  Douglas J. Tweet ,  Sheng Teng Hsu ,  Jong-Jan Lee

    发明人： Jer-Shen Maa ,  Douglas J. Tweet ,  Sheng Teng Hsu ,  Jong-Jan Lee

    IPC分类号： H01L21265

    CPC分类号： H01L21/263 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02502 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/02694 ,  H01L29/1054 ,  Y10S438/933

    摘要： A method is provided for forming a relaxed silicon germanium layer with a high germanium content on a silicon substrate. The method comprises: depositing a single-crystal silicon (Si) buffer layer overlying the silicon substrate; depositing a layer of single-crystal silicon germanium (Si1−xGex) overlying the Si buffer layer having a thickness of 1000 to 5000 Å; implanting the Si1−xGex layer with ionized molecular hydrogen (H2+) a projected range of approximately 100 to 300 Å into the underlying Si buffer layer; optionally, implanting the Si1−xGex layer with a species selected such as boron, He, or Si; annealing; and, in response to the annealing, converting the Si1−xGex layer to a relaxed Si1−xGex layer. Optionally, after annealing, an additional layer of single-crystal Si1−xGex having a thickness of greater than 1000 Å can be deposited overlying the relaxed layer of Si1−xGex.

    摘要翻译： 提供了一种在硅衬底上形成具有高锗含量的松弛硅锗层的方法。 该方法包括：沉积覆盖硅衬底的单晶硅（Si）缓冲层; 沉积覆盖厚度为1000至5000的Si缓冲层的单晶硅锗层（Si1-xGex）; 将具有离子化分子氢（H 2 +）的Si 1-x Ge x层投射到下面的Si缓冲层中约100至300埃的投影范围; 任选地，将Si1-xGex层用诸如硼，氦或硅的物质进行注入; 退火; 并且响应于退火，将Si1-xGex层转化为弛豫的Si1-xGex层。 任选地，在退火之后，可以沉积厚度大于的附加层的单晶Si1-xGex覆盖在Si1-xGex的松弛层上。

    Method of fabricating a low, dark-current germanium-on-silicon pin photo detector
    5.
    发明授权
    Method of fabricating a low, dark-current germanium-on-silicon pin photo detector 有权
    制造低，暗电流硅 - 硅引脚光电探测器的方法

    公开(公告)号：US07811913B2

    公开(公告)日：2010-10-12

    申请号：US11312967

    申请日：2005-12-19

    申请人： Jong-Jan Lee ,  Douglas J. Tweet ,  Jer-Shen Maa ,  Sheng Teng Hsu

    发明人： Jong-Jan Lee ,  Douglas J. Tweet ,  Jer-Shen Maa ,  Sheng Teng Hsu

    IPC分类号： H01L21/265

    CPC分类号： H01L31/105 ,  H01L31/1808 ,  H01L31/1864 ,  Y02E10/50 ,  Y02P70/521 ,  Y10S438/933

    摘要： A method of fabricating a low, dark-current germanium-on-silicon PIN photo detector includes preparing a P-type silicon wafer; implanting the P-type silicon wafer with boron ions; activating the boron ions to form a P+ region on the silicon wafer; forming a boron-doped germanium layer on the P+ silicon surface; depositing an intrinsic germanium layer on the boron-doped germanium layer; cyclic annealing, including a relatively high temperature first anneal step and a relatively low temperature second anneal step; repeating the first and second anneal steps for about twenty cycles, thereby forcing crystal defects to the P+ germanium layer; implanting ions in the surface of germanium layer to form an N+ germanium surface layer and a PIN diode; activating the N+ germanium surface layer by thermal anneal; and completing device according to known techniques to form a low dark-current germanium-on-silicon PIN photodetector.

    摘要翻译： 制造低，暗电流锗硅PIN光检测器的方法包括制备P型硅晶片; 用硼离子注入P型硅晶片; 激活硼离子以在硅晶片上形成P +区; 在P +硅表面上形成硼掺杂锗层; 在硼掺杂的锗层上沉积本征锗层; 循环退火，包括相对高温的第一退火步骤和相对低温的第二退火步骤; 重复第一和第二退火步骤约20个循环，由此迫使晶体缺陷到P +锗层; 在锗层表面注入离子以形成N +锗表面层和PIN二极管; 通过热退火来活化N +锗表面层; 并根据已知技术完成器件以形成低暗电流锗硅PIN光电探测器。

    Ge short wavelength infrared imager
    6.
    发明授权
    Ge short wavelength infrared imager 有权
    Ge短波长红外成像仪

    公开(公告)号：US07651880B2

    公开(公告)日：2010-01-26

    申请号：US11592465

    申请日：2006-11-04

    申请人： Douglas J. Tweet ,  Jer-Shen Maa ,  Jong-Jan Lee ,  Sheng Teng Hsu

    发明人： Douglas J. Tweet ,  Jer-Shen Maa ,  Jong-Jan Lee ,  Sheng Teng Hsu

    IPC分类号： H01L25/00

    CPC分类号： H01L31/1055 ,  H01L27/14643 ,  H01L27/14689

    摘要： A germanium (Ge) short wavelength infrared (SWIR) imager and associated fabrication process are provided. The imager comprises a silicon (Si) substrate with doped wells. An array of pin diodes is formed in a relaxed Ge-containing film overlying the Si substrate, each pin diode having a flip-chip interface. There is a Ge/Si interface, and a doped Ge-containing buffer interposed between the Ge-containing film and the Ge/Si interface. An array of Si CMOS readout circuits is bonded to the flip-chip interfaces. Each readout circuit has a zero volt diode bias interface.

    摘要翻译： 提供锗（Ge）短波长红外（SWIR）成像器和相关制造工艺。 该成像器包括具有掺杂阱的硅（Si）衬底。 在位于Si衬底上的松弛的含Ge膜中形成一个pin二极管阵列，每个pin二极管具有倒装芯片接口。 存在Ge / Si界面和插入含Ge膜和Ge / Si界面之间的含掺杂Ge的缓冲层。 Si CMOS读出电路阵列结合到倒装芯片接口。 每个读出电路都具有零伏二极管偏置接口。

    Method of making CMOS devices on strained silicon on glass
    8.
    发明授权
    Method of making CMOS devices on strained silicon on glass 失效
    在玻璃上的应变硅上制造CMOS器件的方法

    公开(公告)号：US07470573B2

    公开(公告)日：2008-12-30

    申请号：US11060878

    申请日：2005-02-18

    申请人： Jong-Jan Lee ,  Jer-Shen Maa ,  Douglas J. Tweet ,  Yoshi Ono ,  Sheng Teng Hsu

    发明人： Jong-Jan Lee ,  Jer-Shen Maa ,  Douglas J. Tweet ,  Yoshi Ono ,  Sheng Teng Hsu

    IPC分类号： H01L21/30 ,  H01L21/84

    CPC分类号： H01L27/127 ,  H01L27/1214 ,  H01L27/1266 ,  H01L29/7842 ,  H01L29/78621

    摘要： A method of making CMOS devices on strained silicon on glass includes preparing a glass substrate, including forming a strained silicon layer on the glass substrate; forming a silicon oxide layer by plasma oxidation of the strained silicon layer; depositing a layer of doped polysilicon on the silicon oxide layer; forming a polysilicon gate; implanting ions to form a LDD structure; depositing and forming a spacer dielectric on the gate structure; implanting and activation ions to form source and drain structures; depositing a layer of metal film; annealing the layer of metal film to form salicide on the source, drain and gate structures; removing any unreacted metal film; depositing a layer of interlayer dielectric; and forming contact holes and metallizing.

    摘要翻译： 在玻璃上的应变硅上制造CMOS器件的方法包括制备玻璃衬底，包括在玻璃衬底上形成应变硅层; 通过应变硅层的等离子体氧化形成氧化硅层; 在氧化硅层上沉积掺杂多晶硅层; 形成多晶硅栅极; 注入离子以形成LDD结构; 在栅极结构上沉积和形成间隔电介质; 植入和激活离子以形成源和漏结构; 沉积一层金属膜; 退火金属膜层，在源极，漏极和栅极结构上形成硅化物; 去除任何未反应的金属膜; 沉积层间电介质层; 并形成接触孔和金属化。

    Method for isolating silicon germanium dislocation regions in strained-silicon CMOS applications
    9.
    发明授权
    Method for isolating silicon germanium dislocation regions in strained-silicon CMOS applications 有权
    在应变硅CMOS应用中分离硅锗位错区的方法

    公开(公告)号：US07384837B2

    公开(公告)日：2008-06-10

    申请号：US11073185

    申请日：2005-03-03

    申请人： Sheng Teng Hsu ,  Jong-Jan Lee ,  Douglas J. Tweet ,  Jer-shen Maa

    发明人： Sheng Teng Hsu ,  Jong-Jan Lee ,  Douglas J. Tweet ,  Jer-shen Maa

    IPC分类号： H01L21/8238

    CPC分类号： H01L29/1054 ,  H01L21/76224 ,  H01L21/823807 ,  H01L21/823842 ,  H01L21/823878 ,  H01L27/1203 ,  H01L29/78645

    摘要： A dual gate strained-Si MOSFET with thin SiGe dislocation regions and a method for fabricating the same are provided. The method forms a first layer of relaxed SiGe overlying a substrate, having a thickness of less than 5000 Å; forms a second layer of relaxed SiGe overlying the substrate and adjacent to the first layer of SiGe, having a thickness of less than 5000 Å; forms a layer of strained-Si overlying the first and second SiGe layers; forms a shallow trench isolation region interposed between the first SiGe layer and the second SiGe layer; forms an p-well in the substrate and the overlying first layer of SiGe; forming forms a p-well in the substrate and the overlying second layer of SiGe; forms channel regions, in the strained-Si, and forms PMOS and NMOS transistor source and drain regions.

    摘要翻译： 提供具有薄SiGe位错区域的双栅应变Si MOSFET及其制造方法。 该方法形成覆盖衬底的第一层松弛SiGe，厚度小于5000; 形成覆盖衬底并且邻近第一SiGe层的第二层松弛SiGe，其厚度小于5000; 形成层叠在第一和第二SiGe层上的应变层; 形成介于第一SiGe层和第二SiGe层之间的浅沟槽隔离区; 在衬底和SiGe的上覆第一层中形成p阱; 在衬底和SiGe的上覆第二层中形成p阱; 在应变Si中形成沟道区，并形成PMOS和NMOS晶体管的源极和漏极区。