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    Method of semiconductor fabrication incorporating disposable spacer into elevated source/drain processing
    1.
    发明申请
    Method of semiconductor fabrication incorporating disposable spacer into elevated source/drain processing 有权
    将一次性间隔件加入升高的源/漏处理的半导体制造方法

    公开(公告)号：US20050250287A1

    公开(公告)日：2005-11-10

    申请号：US10839385

    申请日：2004-05-05

    申请人： Jian Chen ,  Rode Mora ,  Marc Rossow ,  Yasuhito Shiho

    发明人： Jian Chen ,  Rode Mora ,  Marc Rossow ,  Yasuhito Shiho

    IPC分类号： H01L21/265 ,  H01L21/336 ,  H01L29/78

    CPC分类号： H01L29/6656 ,  H01L21/26586 ,  H01L29/66492 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/66628 ,  H01L29/66772 ,  H01L29/7834

    摘要： A semiconductor fabrication process includes forming a gate electrode overlying a substrate. A first silicon nitride spacer is formed adjacent the gate electrode sidewalls and a disposable silicon nitride spacer is then formed adjacent the offset spacer. An elevated source/drain structure, defined by the boundaries of the disposable spacer, is then formed epitaxially. The disposable spacer is then removed to expose the substrate proximal to the gate electrode and a shallow implant, such as a halo or extension implant, is introduced into the exposed substrate proximal the gate electrode. A replacement spacer is formed substantially where the disposable spacer existed a source/drain implant is done to introduce a source/drain impurity distribution into the elevated source drain. The gate electrode may include an overlying silicon nitride capping layer and the first silicon nitride spacer may contact the capping layer to surround the polysilicon gate electrode in silicon nitride.

    摘要翻译： 半导体制造工艺包括形成覆盖衬底的栅电极。 在栅电极侧壁附近形成第一氮化硅间隔物，然后在偏移间隔物附近形成一次性氮化硅间隔物。 然后由一次性间隔件的边界限定的升高的源极/漏极结构外延形成。 然后去除一次性间隔件以暴露基板靠近栅电极，并且将浅的植入物（例如晕或延伸植入物）引入靠近栅电极的暴露的基底中。 基本上形成替代间隔物，其中一次性间隔物存在，进行源极/漏极注入以将源极/漏极杂质分布引入升高的源极漏极。 栅电极可以包括上覆的氮化硅覆盖层，并且第一氮化硅间隔物可接触覆盖层以在氮化硅中包围多晶硅栅电极。

    Film deposition on a semiconductor wafer
    5.
    发明授权
    Film deposition on a semiconductor wafer 有权
    薄膜沉积在半导体晶圆上

    公开(公告)号：US06881681B2

    公开(公告)日：2005-04-19

    申请号：US10301993

    申请日：2002-11-22

    申请人： Olubunmi O. Adetutu ,  Marc Rossow ,  Anna M. Phillips

    发明人： Olubunmi O. Adetutu ,  Marc Rossow ,  Anna M. Phillips

    IPC分类号： C23C16/44 ,  H01L21/31 ,  H01L21/44 ,  H01L21/469

    CPC分类号： C23C16/4401

    摘要： Heating a reaction chamber or other apparatus in the absence of product wafers to a “curing” temperature above a deposition temperature between the deposition of a film on a first set of semiconductor product wafers and the deposition of a film on a second set of semiconductor product wafers. In some embodiments, a boat with filler wafers is in the reaction chamber when the reaction chamber is heated to the curing temperature. In some examples, the films are deposited by a low pressure chemical vapor deposition (LPCVD) process. With some processes, if the deposition of a film on product wafers is at a temperature below a certain temperature, the film deposited with the product wafer on a boat, filler wafers, and/or other structures in the reaction chamber can cause contamination of product wafers subsequently deposited with a film in the presence of the boat and filler wafers. Contamination from these previously deposited films is inhibited by applying a curing temperature to the deposited fillers in the absence of the product wafers before a film is deposited on the next set of product wafers.

    摘要翻译： 在不存在产品晶片的情况下将反应室或其它装置加热到高于第一组半导体产品晶片上的膜的沉积和第二组半导体产品上的膜的沉积之后的沉积温度的“固化”温度 晶圆 在一些实施例中，当反应室被加热到固化温度时，具有填充物晶片的舟皿在反应室中。 在一些实例中，通过低压化学气相沉积（LPCVD）工艺沉积膜。 通过一些方法，如果在产品晶片上的膜沉积处于低于某一温度的温度，则沉积在产品晶片上的膜在反应室中的船，填料晶片和/或其它结构上可能导致产物污染 随后在存在船和填料晶片的情况下沉积薄膜。 在将膜沉积在下一组产品晶片之前，通过在不存在产品晶片的情况下将沉积的填料施加固化温度来抑制来自这些先前沉积的膜的污染。