公开(公告)号：US20110116246A1

公开(公告)日：2011-05-19

申请号：US12818497

申请日：2010-06-18

申请人： Jin-Won LEE ,  Yul-Kyo Chung ,  Seung-Hyun Sohn ,  Moon-Il Kim

发明人： Jin-Won LEE ,  Yul-Kyo Chung ,  Seung-Hyun Sohn ,  Moon-Il Kim

IPC分类号： H05K1/18 ,  B32B37/02

CPC分类号： H05K1/18 ,  H01L21/568 ,  H01L2224/04105 ,  H01L2224/32145 ,  H01L2224/73267 ,  H05K3/30 ,  H05K3/46 ,  Y10T29/49146 ,  Y10T156/10

摘要： An electronic component embedded printed circuit board and a method of manufacturing the same are disclosed. The electronic component embedded printed circuit board in accordance with an embodiment of the present invention can include a first substrate, which has a cavity formed therein, a first electronic component, which is embedded in the cavity in a face-down manner, a second electronic component, which is stacked on an upper side of the first electronic component and embedded in the cavity in a face-up manner, and a second substrate, which is stacked on upper and lower surfaces of the first substrate.

摘要翻译： 公开了电子部件嵌入式印刷电路板及其制造方法。 根据本发明的实施例的电子部件嵌入式印刷电路板可以包括：第一基板，其具有形成在其中的空腔;第一电子部件，以面朝下的方式嵌入在所述空腔中;第二电子部件 所述第一基板被堆叠在所述第一电子部件的上侧并以面朝上的方式嵌入所述空腔中;以及第二基板，其被堆叠在所述第一基板的上表面和下表面上。

公开(公告)号：US20120291274A1

公开(公告)日：2012-11-22

申请号：US13563271

申请日：2012-07-31

申请人： Jin-Won LEE ,  Yul-Kyo CHUNG ,  Seung-Hyun SOHN ,  Moon-Il KIM

发明人： Jin-Won LEE ,  Yul-Kyo CHUNG ,  Seung-Hyun SOHN ,  Moon-Il KIM

IPC分类号： H05K3/30

CPC分类号： H05K1/18 ,  H01L21/568 ,  H01L2224/04105 ,  H01L2224/32145 ,  H01L2224/73267 ,  H05K3/30 ,  H05K3/46 ,  Y10T29/49146 ,  Y10T156/10

摘要： An electronic component embedded printed circuit board and a method of manufacturing the same are disclosed. The electronic component embedded printed circuit board in accordance with an embodiment of the present invention can include a first substrate, which has a cavity formed therein, a first electronic component, which is embedded in the cavity in a face-down manner, a second electronic component, which is stacked on an upper side of the first electronic component and embedded in the cavity in a face-up manner, and a second substrate, which is stacked on upper and lower surfaces of the first substrate.

摘要翻译： 公开了电子部件嵌入式印刷电路板及其制造方法。 根据本发明的实施例的电子部件嵌入式印刷电路板可以包括：第一基板，其具有形成在其中的空腔;第一电子部件，以面朝下的方式嵌入在所述空腔中;第二电子部件 所述第一基板被堆叠在所述第一电子部件的上侧并以面朝上的方式嵌入所述空腔中;以及第二基板，其被堆叠在所述第一基板的上表面和下表面上。

公开(公告)号：US20110216515A1

公开(公告)日：2011-09-08

申请号：US12852063

申请日：2010-08-06

申请人： Jin-Won LEE ,  Yul-Kyo Chung ,  Doo-Hwan Lee ,  Seung-Hyun Sohn ,  Dae-Jung Byun

发明人： Jin-Won LEE ,  Yul-Kyo Chung ,  Doo-Hwan Lee ,  Seung-Hyun Sohn ,  Dae-Jung Byun

IPC分类号： H05K1/18 ,  B32B38/10 ,  B32B38/04

CPC分类号： B32B38/04 ,  B32B38/10 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/32145 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/351 ,  H05K1/18 ,  H01L2924/00

摘要： An electro device embedded printed circuit board and a manufacturing method thereof are disclosed. In accordance with an embodiment of the present invention, an electro device embedded printed circuit board is manufactured by: adhering a first electro device on a supporting body through a face-down method; adhering a second electro device on an upper surface of the first electro device through a face-up method; stacking a pure resin layer and a reinforcing layer on an upper side of the supporting body, wherein the first electro device and the second electro device are embedded in the pure resin layer; removing the supporting body; stacking an insulation layer on a lower side of the first electro device, a reinforcing material having been impregnated in the insulation layer; and patterning a circuit on each of the reinforcing layer and the insulation layer.

摘要翻译： 公开了电子装置嵌入式印刷电路板及其制造方法。 根据本发明的实施例，通过以下方式制造电子装置嵌入式印刷电路板：通过面朝下方法将第一电子装置粘附在支撑体上; 通过面朝上方法将第二电子装置粘附在第一电子装置的上表面上; 在支撑体的上侧堆叠纯树脂层和增强层，其中第一电装置和第二电装置嵌入在纯树脂层中; 去除支撑体; 在第一电子装置的下侧堆叠绝缘层，浸渍在绝缘层中的增强材料; 并且在每个加强层和绝缘层上构图电路。

公开(公告)号：US20100001308A1

公开(公告)日：2010-01-07

申请号：US12495854

申请日：2009-07-01

申请人： Kyoung-Il PARK ,  Jin-Won LEE ,  Sun-Hong KIM ,  Min-Sik KIM ,  Ji-Na LEE

发明人： Kyoung-Il PARK ,  Jin-Won LEE ,  Sun-Hong KIM ,  Min-Sik KIM ,  Ji-Na LEE

IPC分类号： H01L33/00

CPC分类号： H01L33/62 ,  H01L33/486 ,  H01L33/642 ,  H01L33/647 ,  H01L2924/0002 ,  H01L2924/00

摘要： Provided is a side view light emitting diode package including a housing that includes a front side part and a rear side part integrally formed with the front side part, the front side part having a light emission part; and a lead frame that is located between the front side part and the rear side part, wherein the lead frame includes a first lead connected to a first electrode of a Light Emitting Diode (LED) chip and a second lead connected to a second electrode of the LED chip, wherein the front side part includes a first groove, a second groove, and a third groove, wherein the first lead and the second lead are extended through the first groove and the second groove, respectively, and a heat dissipation part is extended from the first lead through the third groove to an outside of the LED package.

摘要翻译： 提供一种侧视发光二极管封装，其包括壳体，该壳体包括前侧部分和与前侧部分一体形成的后侧部分，前侧部分具有发光部分; 以及位于前侧部分和后侧部分之间的引线框架，其中引线框架包括连接到发光二极管（LED）芯片的第一电极的第一引线和连接到第二电极的第二引线 所述LED芯片，其中所述前侧部分包括第一凹槽，第二凹槽和第三凹槽，其中所述第一引线和所述第二引线分别延伸穿过所述第一凹槽和所述第二凹槽，并且散热部分 从第一引线延伸通过第三凹槽延伸到LED封装的外部。

公开(公告)号：US20120037906A1

公开(公告)日：2012-02-16

申请号：US13115088

申请日：2011-05-24

申请人： Hye-Young RYU ,  Woo-Geun LEE ,  Young-Joo CHOI ,  Kyoung-Jae CHUNG ,  Jin-Won LEE ,  Seung-Ha CHOI ,  Hee-Jun BYEON ,  Pil-Sang YUN

发明人： Hye-Young RYU ,  Woo-Geun LEE ,  Young-Joo CHOI ,  Kyoung-Jae CHUNG ,  Jin-Won LEE ,  Seung-Ha CHOI ,  Hee-Jun BYEON ,  Pil-Sang YUN

IPC分类号： H01L29/786 ,  H01L21/44

CPC分类号： H01L27/1214 ,  H01L27/1225 ,  H01L27/1255

摘要： A thin film transistor array substrate capable of reducing degradation of a device due to degradation of an oxide semiconductor pattern and a method of fabricating the same are provided. The thin film transistor array substrate may include an insulating substrate on which a gate electrode is formed, a gate insulating film formed on the insulating substrate, an oxide semiconductor pattern disposed on the gate insulating film, an anti-etching pattern formed on the oxide semiconductor pattern, and a source electrode and a drain electrode formed on the anti-etching pattern. The oxide semiconductor pattern may include an edge portion positioned between the source electrode and the drain electrode, and the edge portion may include at least one conductive region and at least one non-conductive region.

摘要翻译： 提供了能够降低由于氧化物半导体图案的劣化引起的器件劣化的薄膜晶体管阵列基板及其制造方法。 薄膜晶体管阵列基板可以包括其上形成有栅极的绝缘基板，形成在绝缘基板上的栅极绝缘膜，设置在栅极绝缘膜上的氧化物半导体图案，形成在氧化物半导体上的抗蚀刻图案 图案，以及形成在防蚀刻图案上的源电极和漏电极。 氧化物半导体图案可以包括位于源电极和漏电极之间的边缘部分，并且边缘部分可以包括至少一个导电区域和至少一个非导电区域。

公开(公告)号：US20110097061A1

公开(公告)日：2011-04-28

申请号：US12856329

申请日：2010-08-13

申请人： Jin-Won LEE ,  Chong-Sam Chung ,  Hae-in Chung

发明人： Jin-Won LEE ,  Chong-Sam Chung ,  Hae-in Chung

IPC分类号： G03B17/00

CPC分类号： H04N5/2253 ,  H04N5/23287

摘要： An image stabilizer is provided, which compensates for an external turbulence caused by hand-shake by moving an imaging unit. The image stabilizer includes a first yoke, a second yoke, and a driving frame interposed between the first yoke and the second yoke and movable in a vertical direction, a horizontal direction, and a rotation direction with respect to an optical axis. The imaging unit is mounted in a center of the driving frame. The image stabilizer also includes a coil plate connected to a surface of the driving frame facing the first yoke and having a plurality of pattern coils arranged at locations corresponding to a plurality of magnets of the second yoke. The image stabilizer further includes a support unit disposed on a surface of the driving frame facing the second yoke and supporting the driving frame in pitch, yaw and roll directions with respect to the second yoke.

摘要翻译： 提供了一种图像稳定器，其通过移动成像单元来补偿由手抖造成的外部湍流。 图像稳定器包括第一磁轭，第二磁轭和插入在第一磁轭和第二磁轭之间的驱动框架，并且可相对于光轴在垂直方向，水平方向和旋转方向上移动。 成像单元安装在驱动框架的中心。 图像稳定器还包括连接到面向第一磁轭的驱动框架的表面的线圈板，并且具有布置在对应于第二磁轭的多个磁体的位置处的多个图案线圈。 图像稳定器还包括支撑单元，其设置在面向第二磁轭的驱动框架的表面上，并相对于第二磁轭以俯仰，偏转和滚动方向支撑驱动框架。

公开(公告)号：US20090215500A1

公开(公告)日：2009-08-27

申请号：US12435369

申请日：2009-05-04

申请人： Hyaung-Sic YOU ,  Jin-Won LEE

发明人： Hyaung-Sic YOU ,  Jin-Won LEE

IPC分类号： H04B1/38 ,  G06F3/02

CPC分类号： G06F3/0219 ,  H04M1/23 ,  H04M2250/22

摘要： A mobile communications terminal and a method for preventing an input error of a key input unit are provided. The mobile communications terminal includes a touch sensor unit for sensing a key that is input by touching a keypad region in order to output a key input signal corresponding to the key and a controller adapted to determine a key input according to either a priority between multiple keys from which key signals are received or whether a received key signal was generated inadvertently.

摘要翻译： 提供一种用于防止键输入单元的输入错误的移动通信终端和方法。 移动通信终端包括触摸传感器单元，用于感测通过触摸小键盘区域输入的键，以便输出与该键相对应的键输入信号，以及控制器，适于根据多个键之间的优先级来确定键输入 接收到哪个键信号，或是是否无意中产生了接收到的键信号。

公开(公告)号：US20120217493A1

公开(公告)日：2012-08-30

申请号：US13365704

申请日：2012-02-03

申请人： Jin-Won LEE ,  Woo Geun LEE ,  Kap Soo YOON ,  Ki-Won KIM ,  Hyun-Jung LEE ,  Hee-Jun BYEON ,  Ji-Soo OH

发明人： Jin-Won LEE ,  Woo Geun LEE ,  Kap Soo YOON ,  Ki-Won KIM ,  Hyun-Jung LEE ,  Hee-Jun BYEON ,  Ji-Soo OH

IPC分类号： H01L29/786 ,  H01L33/02 ,  H01L29/24

CPC分类号： H01L27/1225 ,  H01L29/41733

摘要： A thin film transistor array panel includes: a gate electrode disposed on an insulation substrate; a gate insulating layer disposed on the gate electrode; a first electrode and an oxide semiconductor disposed directly on the gate insulating layer; a source electrode and a drain electrode formed on the oxide semiconductor; a passivation layer disposed on the first electrode, the source electrode, and the drain electrode; and a second electrode disposed on the passivation layer.

摘要翻译： 薄膜晶体管阵列面板包括：设置在绝缘基板上的栅电极; 设置在栅电极上的栅极绝缘层; 直接设置在栅极绝缘层上的第一电极和氧化物半导体; 形成在所述氧化物半导体上的源电极和漏电极; 设置在所述第一电极，所述源电极和所述漏电极上的钝化层; 以及设置在钝化层上的第二电极。

公开(公告)号：US20130146864A1

公开(公告)日：2013-06-13

申请号：US13464613

申请日：2012-05-04

申请人： Ki-Won KIM ,  Kap Soo YOON ,  Woo Geun LEE ,  Jin-Won LEE ,  Se-Myung KWON ,  Jung Ouck AHN ,  Si Jin KIM

发明人： Ki-Won KIM ,  Kap Soo YOON ,  Woo Geun LEE ,  Jin-Won LEE ,  Se-Myung KWON ,  Jung Ouck AHN ,  Si Jin KIM

IPC分类号： H01L29/786 ,  H01L33/08 ,  H01L21/336

CPC分类号： H01L29/41733 ,  H01L27/1225 ,  H01L27/1259 ,  H01L29/66765 ,  H01L29/78696

摘要： A method for manufacturing a thin film transistor array panel includes forming a gate line and a gate electrode protruding from the gate line on a substrate; forming a gate insulating layer on the gate line and the gate electrode; depositing sequentially a semiconductor material and a metal material on the gate insulating layer; performing a first etching operation on the semiconductor material and the metal material using a first mask to form a semiconductor layer and a metal layer, the metal layer including a data line, a source electrode, and a drain electrode, in which the drain electrode protrudes from the data line, and the source electrode and the drain electrode having an integral shape; and performing a second etching operation on the metal layer using a second mask to divide the source electrode and the drain electrode.

摘要翻译： 一种制造薄膜晶体管阵列面板的方法，包括：在基板上形成从栅极线突出的栅极线和栅电极; 在栅极线和栅电极上形成栅极绝缘层; 在栅极绝缘层上依次沉积半导体材料和金属材料; 使用第一掩模对所述半导体材料和所述金属材料进行第一蚀刻操作以形成半导体层和金属层，所述金属层包括数据线，源电极和漏电极，其中所述漏电极突出 数据线，源电极和漏电极具有整体形状; 以及使用第二掩模对所述金属层进行第二蚀刻操作以分割所述源电极和所述漏电极。

公开(公告)号：US20160165135A1

公开(公告)日：2016-06-09

申请号：US14561882

申请日：2014-12-05

申请人： Yong-Hee LEE ,  Jin-Won LEE

发明人： Yong-Hee LEE ,  Jin-Won LEE

IPC分类号： H04N5/232 ,  G06T3/40 ,  H04N5/262

CPC分类号： H04N5/23238 ,  G03B5/00 ,  G03B17/38 ,  G03B17/568 ,  G03B19/023 ,  G03B35/08 ,  G03B2205/0092 ,  G03B2206/00 ,  G03B2217/002 ,  G06T3/4038 ,  H04N5/2258 ,  H04N5/23209 ,  H04N5/23216 ,  H04N5/23293 ,  H04N5/2628

摘要： A imaging apparatus is disclosed. The imaging apparatus according to an exemplary embodiment includes a camera configured to capture a subject, a combiner configured to be combined with another imaging apparatus, a controller configured to perform capturing by controlling the camera and the other imaging apparatus, respectively, and an image processor configured to in response to a field of view interference occurring between the camera and the other imaging apparatus, delete an area where the field of view interference occurs from an image captured by the camera.

摘要翻译： 公开了一种成像装置。 根据示例性实施例的成像装置包括被配置为捕获被摄体的相机，被配置为与另一成像装置组合的组合器，被配置为分别通过控制相机和另一成像装置执行拍摄的控制器和图像处理器 被配置为响应于在相机和另一成像装置之间出现的视场干扰，从摄像机拍摄的图像中删除发生视场干扰的区域。