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公开(公告)号:US20060149918A1
公开(公告)日:2006-07-06
申请号:US11323473
申请日:2005-12-30
申请人: John Rudelic , Dennis O'Connor , Mark Fullerton , Ray Richardson
发明人: John Rudelic , Dennis O'Connor , Mark Fullerton , Ray Richardson
IPC分类号: G06F12/10
CPC分类号: G06F12/1441 , G06F12/0246 , G06F2212/1052 , G06F2212/7201
摘要: A memory device includes a flag register to modify the address map of the memory device based on the state of an input node on the memory device.
摘要翻译: 存储器件包括标志寄存器,用于根据存储器件上的输入节点的状态修改存储器件的地址映射。
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公开(公告)号:US20060149917A1
公开(公告)日:2006-07-06
申请号:US11027784
申请日:2004-12-30
申请人: Dennis O'Connor , Mark Fullerton , Ray Richardson
发明人: Dennis O'Connor , Mark Fullerton , Ray Richardson
IPC分类号: G06F12/14
CPC分类号: G06F12/1441
摘要: A memory controller partitions memory into secure partitions and non-secure partitions.
摘要翻译: 内存控制器将内存分为安全分区和非安全分区。
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公开(公告)号:US20060143687A1
公开(公告)日:2006-06-29
申请号:US11027913
申请日:2004-12-28
申请人: Dennis O'Connor , Mark Fullerton , Ray Richardson
发明人: Dennis O'Connor , Mark Fullerton , Ray Richardson
IPC分类号: H04L9/00
摘要: A storage controller includes a command pointer register. The command pointer register points to a chain of commands in memory, and also includes a security status field to indicate a security status of the first command in the command chain. Each command in the command chain may also include a security status field that indicates the security status of the following command in the chain.
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4.
公开(公告)号:US20060129710A1
公开(公告)日:2006-06-15
申请号:US11013217
申请日:2004-12-14
申请人: Dennis O'Connor , Mark Fullerton
发明人: Dennis O'Connor , Mark Fullerton
IPC分类号: G06F13/28
CPC分类号: G06F21/79 , G06F13/28 , G06F21/71 , G06F2221/2105
摘要: A wireless device dynamically programs a control register for a command-chain driven DMA device. The control register stores a beginning address of the linked list of commands and a secure bit. The secure bit is set if the transaction writing register is secure and a bit in the data being written into the register is set. DMA devices and other bus-mastering peripherals perform tasks described via a command chain that has access to secure resources when the processor is operating in the secure mode and the secure bit is set.
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公开(公告)号:US08782314B2
公开(公告)日:2014-07-15
申请号:US13249057
申请日:2011-09-29
申请人: Love Kothari , Mark Fullerton
发明人: Love Kothari , Mark Fullerton
CPC分类号: H03L7/0802 , G06F1/26 , G06F1/32 , G06F1/3203 , G06F1/3228 , G06F12/14 , G06F21/44 , H01L2924/0002 , H03K3/0315 , H03K3/037 , H03K3/0375 , H03K5/133 , H03K19/01 , H03K2005/00019 , H03K2005/00026 , H03K2005/00058 , H03L7/097 , H03L7/0997 , H01L2924/00
摘要: Embodiments include a system and method for an interrupt controller that propagates interrupts to a subsystem in a system-on-a-chip (SOC). Interrupts are provided to an interrupt controller that controls access of interrupts to a particular subsystem in the SOC that includes multiple subsystems. Each subsystem in the SOC generates multiple interrupts to other subsystems in the SOC. The interrupt controller processes multiple interrupts and generates an interrupt output. The interrupt output is then transmitted to a particular subsystem.
摘要翻译: 实施例包括用于在片上系统(SOC)中将中断传播到子系统的中断控制器的系统和方法。 中断提供给一个中断控制器,该中断控制器控制对包含多个子系统的SOC中特定子系统的中断访问。 SOC中的每个子系统对SOC中的其他子系统产生多个中断。 中断控制器处理多个中断并产生中断输出。 然后将中断输出发送到特定的子系统。
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公开(公告)号:US20130047023A1
公开(公告)日:2013-02-21
申请号:US13331874
申请日:2011-12-20
申请人: Paul Penzes , Mark Fullerton
发明人: Paul Penzes , Mark Fullerton
IPC分类号: G06F1/04
CPC分类号: H03L7/0802 , G06F1/26 , G06F1/32 , G06F1/3203 , G06F1/3228 , G06F12/14 , G06F21/44 , H01L2924/0002 , H03K3/0315 , H03K3/037 , H03K3/0375 , H03K5/133 , H03K19/01 , H03K2005/00019 , H03K2005/00026 , H03K2005/00058 , H03L7/097 , H03L7/0997 , H01L2924/00
摘要: Adaptive clocking schemes for synchronized on-chip functional Hocks are provided. The clocking schemes enable synchronous clocking which can be adapted according to changes in signal path propagation delay due temperature, process, and voltage variations, for example, in embodiments, the docking schemes allow for the capacity utilization of a logic path to be increased.
摘要翻译: 提供了同步片上功能Hocks的自适应时钟方案。 时钟方案使得可以根据信号路径传播延迟因温度,过程和电压变化而改变的同步时钟,例如在实施例中,对接方案允许增加逻辑路径的容量利用。
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7.
公开(公告)号:US08180996B2
公开(公告)日:2012-05-15
申请号:US12466996
申请日:2009-05-15
申请人: Mark Fullerton , Barry Evans
发明人: Mark Fullerton , Barry Evans
IPC分类号: G06F12/06
CPC分类号: G06F12/1081 , G06F12/1036
摘要: A distributed computing system that incorporates enhanced distributed storage and a universal address system and method are provided.
摘要翻译: 提供了一种结合增强分布式存储和通用地址系统和方法的分布式计算系统。
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公开(公告)号:USD617852S1
公开(公告)日:2010-06-15
申请号:US29344270
申请日:2009-09-25
申请人: Greg Fisher , Stacy Crawford , Mark Fullerton , Lee Fullerton
设计人: Greg Fisher , Stacy Crawford , Mark Fullerton , Lee Fullerton
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公开(公告)号:USD616508S1
公开(公告)日:2010-05-25
申请号:US29344274
申请日:2009-09-25
申请人: Greg Fisher , Stacy Crawford , Mark Fullerton , Lee Fullerton
设计人: Greg Fisher , Stacy Crawford , Mark Fullerton , Lee Fullerton
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公开(公告)号:US20070247182A1
公开(公告)日:2007-10-25
申请号:US11395871
申请日:2006-03-31
申请人: Timothy Beatty , Mark Fullerton , Tom Mozdzen
发明人: Timothy Beatty , Mark Fullerton , Tom Mozdzen
IPC分类号: H03K19/00
摘要: A protection circuit is disclosed, for preventing access to stored security key data after the security key is no longer used. The protection circuit performs operations on a programming circuit used to program a bit of the security key. The protection circuit prevents inspection of the security key bit, using several techniques. Subsequent inspection of the programming circuit does not reveal the value of the security key bit.
摘要翻译: 公开了一种用于在不再使用安全密钥之后防止对存储的安全密钥数据的访问的保护电路。 保护电路对用于编程安全密钥位的编程电路进行操作。 保护电路使用几种技术来防止对安全密钥位的检查。 对编程电路的后续检查不会显示安全密钥位的值。
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