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    APPARATUS AND METHOD TO COMBINE PIN FUNCTIONALITY IN AN INTEGRATED CIRCUIT
    3.
    发明申请
    APPARATUS AND METHOD TO COMBINE PIN FUNCTIONALITY IN AN INTEGRATED CIRCUIT 审中-公开
    在集成电路中组合引脚功能的装置和方法

    公开(公告)号：US20130082764A1

    公开(公告)日：2013-04-04

    申请号：US13250677

    申请日：2011-09-30

    申请人： Paul Penzes ,  Love Kothari ,  Ajat Hukkoo ,  Mark Fullerton ,  Veronica Alarcon ,  Zhongmin Zhang ,  Kerry Alan Thompson ,  Russell Radke

    发明人： Paul Penzes ,  Love Kothari ,  Ajat Hukkoo ,  Mark Fullerton ,  Veronica Alarcon ,  Zhongmin Zhang ,  Kerry Alan Thompson ,  Russell Radke

    IPC分类号： G05F3/02 ,  H03B1/00 ,  G11C5/14

    CPC分类号： G11C29/56 ,  G11C2029/5602

    摘要： An apparatus and method are disclosed to combine pad functionality in an integrated circuit. A power, ground, or signal pad is connected to a power, ground, or signal source, respectively. The power, ground, or signal pad is additionally connected to an additional signal source, such as automatic test equipment in a testing environment. By temporarily disconnecting either the power, ground, or signal source, from the functional block within the integrated circuit to which the source is delivered, the same pad may pass in another signal to other portions of the integrated circuit. In the alternative, the same pad may pass in another signal to other portions of the integrated circuit without disconnecting the original signal by coupling the additional signal over the original signal. Further, combining pad functionality enables reuse of an input pad as an output pad for signals originating from within the integrated circuit.

    摘要翻译： 公开了一种在集成电路中组合焊盘功能的装置和方法。 电源，接地或信号焊盘分别连接到电源，接地或信号源。 电源，接地或信号焊盘另外连接到附加信号源，例如测试环境中的自动测试设备。 通过将电源，接地或信号源暂时断开与源传输到的集成电路内的功能块，同一焊盘可以将另一个信号传递到集成电路的其他部分。 在替代方案中，相同的焊盘可以将另一个信号传递到集成电路的其它部分，而不会通过在原始信号上耦合附加信号来断开原始信号。 此外，组合焊盘功能使得可以将输入焊盘重新用作来自集成电路内的信号作为输出焊盘。

    Integrated circuit with pre-heating for reduced subthreshold leakage
    4.
    发明授权
    Integrated circuit with pre-heating for reduced subthreshold leakage 有权
    具有预热功能的集成电路可降低亚阈值泄漏

    公开(公告)号：US08575993B2

    公开(公告)日：2013-11-05

    申请号：US13247694

    申请日：2011-09-28

    申请人： Paul Penzes ,  Mark Fullerton

    发明人： Paul Penzes ,  Mark Fullerton

    IPC分类号： H01L35/00

    CPC分类号： H03L7/0802 ,  G06F1/26 ,  G06F1/32 ,  G06F1/3203 ,  G06F1/3228 ,  G06F12/14 ,  G06F21/44 ,  H01L2924/0002 ,  H03K3/0315 ,  H03K3/037 ,  H03K3/0375 ,  H03K5/133 ,  H03K19/01 ,  H03K2005/00019 ,  H03K2005/00026 ,  H03K2005/00058 ,  H03L7/097 ,  H03L7/0997 ,  H01L2924/00

    摘要： Certain semiconductor processes provide for the use of multiple different types of transistors with different threshold voltages in a single IC. It can be shown that in certain ones of these semiconductor processes, the speed at which high threshold transistors can operate at decreases with decreasing temperature. Thus, the overall processing speed of an IC that implements high threshold transistors is often limited by the lowest temperature at which the IC is designed (or guaranteed) to properly function. Embodiments of a system and method that overcome this deficiency by “pre-heating” the IC (or at least portions of the IC that implement the high threshold transistors) such that the IC can operate at a frequency (once pre-heated) higher than what would otherwise be possible for a given, minimum temperature at which the IC is designed (or guaranteed) to properly function at are provided.

    摘要翻译： 某些半导体工艺提供在单个IC中使用具有不同阈值电压的多种不同类型的晶体管。 可以看出，在这些半导体工艺中的某些中，高阈值晶体管可以运行的速度随着温度的降低而降低。 因此，实现高阈值晶体管的IC的总体处理速度通常受IC设计（或保证）以适当地起作用的最低温度的限制。 通过“预热”IC（或实现高阈值晶体管的IC的至少部分）来克服这种缺陷的系统和方法的实施例，使得IC可以以高于 在设计（或保证）设计IC（或保证）的给定最低温度下，将提供适当的功能。

    Integrated Circuit With Pre-Heating For Reduced Subthreshold Leakage
    5.
    发明申请
    Integrated Circuit With Pre-Heating For Reduced Subthreshold Leakage 有权
    具有预热的集成电路，以减少亚阈值泄漏

    公开(公告)号：US20130043927A1

    公开(公告)日：2013-02-21

    申请号：US13247694

    申请日：2011-09-28

    申请人： Paul PENZES ,  Mark Fullerton

    发明人： Paul PENZES ,  Mark Fullerton

    IPC分类号： H03K3/011

    CPC分类号： H03L7/0802 ,  G06F1/26 ,  G06F1/32 ,  G06F1/3203 ,  G06F1/3228 ,  G06F12/14 ,  G06F21/44 ,  H01L2924/0002 ,  H03K3/0315 ,  H03K3/037 ,  H03K3/0375 ,  H03K5/133 ,  H03K19/01 ,  H03K2005/00019 ,  H03K2005/00026 ,  H03K2005/00058 ,  H03L7/097 ,  H03L7/0997 ,  H01L2924/00

    摘要： Certain semiconductor processes provide for the use of multiple different types of transistors with different threshold voltages in a single IC. It can be shown that in certain ones of these semiconductor processes, the speed at which high threshold transistors can operate at decreases with decreasing temperature. Thus, the overall processing speed of an IC that implements high threshold transistors is often limited by the lowest temperature at which the IC is designed (or guaranteed) to properly function. Embodiments of a system and method that overcome this deficiency by “pre-heating” the IC (or at least portions of the IC that implement the high threshold transistors) such that the IC can operate at a frequency (once pre-heated) higher than what would otherwise be possible for a given, minimum temperature at which the IC is designed (or guaranteed) to properly function at are provided.

    摘要翻译： 某些半导体工艺提供在单个IC中使用具有不同阈值电压的多种不同类型的晶体管。 可以看出，在这些半导体工艺中的某些中，高阈值晶体管可以运行的速度随着温度的降低而降低。 因此，实现高阈值晶体管的IC的总体处理速度通常受IC设计（或保证）以适当地起作用的最低温度的限制。 通过预热IC（或实现高阈值晶体管的IC的至少一部分）来克服这种缺陷的系统和方法的实施例，使得IC可以以比将被加热的频率高（一次预热） 否则可能在设计（或保证）IC的给定最低温度下提供正确的功能。

    Adaptive ultra-low voltage memory
    6.
    发明授权
    Adaptive ultra-low voltage memory 有权
    自适应超低电压存储器

    公开(公告)号：US08700972B2

    公开(公告)日：2014-04-15

    申请号：US13289691

    申请日：2011-11-04

    申请人： Paul Penzes ,  Mark Fullerton ,  Ajat Hukkoo ,  John Walley

    发明人： Paul Penzes ,  Mark Fullerton ,  Ajat Hukkoo ,  John Walley

    IPC分类号： H03M13/00 ,  G11C29/00

    CPC分类号： G06F1/3275 ,  G06F1/3206 ,  G06F1/3296 ,  G06F11/1064 ,  G06F12/0864 ,  G06F2212/1028 ,  G06F2212/601 ,  H03M13/19 ,  H03M13/3715 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D10/172

    摘要： Embodiments provide an adaptive memory that allows for low voltage modes of operation. In the low voltage modes of operation, the supply voltage provided to the memory is reduced below Vcc(min), which allows for significant savings in the power consumption of circuit components (e.g., the CPU) whose minimum voltage is dictated by Vcc(min). According to further embodiments, the memory can be configured dynamically according to various configurations depending on desired power savings (e.g., target Vcc(min)) and/or performance requirements (e.g., reliability, cache size requirement, etc.).

    摘要翻译： 实施例提供允许低电压操作模式的自适应存储器。 在低电压工作模式下，提供给存储器的电源电压降至低于Vcc（min），这样可以显着节省最小电压由Vcc（min）决定的电路组件（例如CPU）的功耗 ）。 根据另外的实施例，可以根据期望的功率节省（例如，目标Vcc（min））和/或性能要求（例如，可靠性，高速缓存大小要求等）根据各种配置来动态地配置存储器。

    Adaptive Ultra-Low Voltage Memory
    7.
    发明申请
    Adaptive Ultra-Low Voltage Memory 有权
    自适应超低电压存储器

    公开(公告)号：US20130117626A1

    公开(公告)日：2013-05-09

    申请号：US13289691

    申请日：2011-11-04

    申请人： Paul PENZES ,  Mark Fullerton ,  Ajat Hukkoo ,  John Walley

    发明人： Paul PENZES ,  Mark Fullerton ,  Ajat Hukkoo ,  John Walley

    IPC分类号： H03M13/09 ,  G06F11/10 ,  G06F1/26

    CPC分类号： G06F1/3275 ,  G06F1/3206 ,  G06F1/3296 ,  G06F11/1064 ,  G06F12/0864 ,  G06F2212/1028 ,  G06F2212/601 ,  H03M13/19 ,  H03M13/3715 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D10/172

    摘要： Embodiments provide an adaptive memory that allows for low voltage modes of operation. In the low voltage modes of operation, the supply voltage provided to the memory is reduced below Vcc(min), which allows for significant savings in the power consumption of circuit components (e.g., the CPU) whose minimum voltage is dictated by Vcc(min). According to further embodiments, the memory can be configured dynamically according to various configurations depending on desired power savings (e.g., target Vcc(min)) and/or performance requirements (e.g., reliability, cache size requirement, etc.).

    摘要翻译： 实施例提供允许低电压操作模式的自适应存储器。 在低电压工作模式下，提供给存储器的电源电压降至低于Vcc（min），这样可以显着节省最小电压由Vcc（min）决定的电路组件（例如CPU）的功耗 ）。 根据另外的实施例，可以根据期望的功率节省（例如，目标Vcc（min））和/或性能要求（例如，可靠性，高速缓存大小要求等）根据各种配置来动态地配置存储器。