公开(公告)号：US08829548B2

公开(公告)日：2014-09-09

申请号：US13554026

申请日：2012-07-20

申请人： Jong In Yang ,  Sung Tae Kim ,  Yong Il Kim ,  Su Yeol Lee ,  Seung Wan Chae ,  Hyung Duk Ko ,  Yung Ho Ryu

发明人： Jong In Yang ,  Sung Tae Kim ,  Yong Il Kim ,  Su Yeol Lee ,  Seung Wan Chae ,  Hyung Duk Ko ,  Yung Ho Ryu

IPC分类号： H01L33/00

CPC分类号： H01L25/167 ,  H01L2224/48091 ,  H01L2224/49107 ,  H01L2924/00014

摘要： A light emitting device package includes: an undoped semiconductor substrate having first and second surfaces opposed to each other; first and second conductive vias penetrating the undoped semiconductor substrate; a light emitting device mounted on one region of the first surface; a bi-directional Zener diode formed by doping an impurity on the second surface of the undoped semiconductor substrate and having a Zener breakdown voltage in both directions; and first and second external electrodes formed on the second surface of the undoped semiconductor substrate such that they connect the first and second conductive vias to both ends of the bi-directional Zener diode region, respectively.

摘要翻译： 发光器件封装包括：具有彼此相对的第一和第二表面的未掺杂的半导体衬底; 穿过未掺杂的半导体衬底的第一和第二导电通孔; 安装在所述第一表面的一个区域上的发光器件; 通过在未掺杂的半导体衬底的第二表面上掺杂杂质并在两个方向上具有齐纳击穿电压形成的双向齐纳二极管; 以及形成在未掺杂的半导体衬底的第二表面上的第一和第二外部电极，使得它们分别将第一和第二导电通孔连接到双向齐纳二极管区域的两端。

公开(公告)号：US20130020598A1

公开(公告)日：2013-01-24

申请号：US13554026

申请日：2012-07-20

申请人： Jong In Yang ,  Sung Tae Kim ,  Yong Il Kim ,  Su Yeol Lee ,  Seung Wan Chae ,  Hyung Duk Ko ,  Yung Ho Ryu

发明人： Jong In Yang ,  Sung Tae Kim ,  Yong Il Kim ,  Su Yeol Lee ,  Seung Wan Chae ,  Hyung Duk Ko ,  Yung Ho Ryu

IPC分类号： H01L33/50 ,  H01L33/62

CPC分类号： H01L25/167 ,  H01L2224/48091 ,  H01L2224/49107 ,  H01L2924/00014

摘要： A light emitting device package includes: an undoped semiconductor substrate having first and second surfaces opposed to each other; first and second conductive vias penetrating the undoped semiconductor substrate; a light emitting device mounted on one region of the first surface; a bi-directional Zener diode formed by doping an impurity on the second surface of the undoped semiconductor substrate and having a Zener breakdown voltage in both directions; and first and second external electrodes formed on the second surface of the undoped semiconductor substrate such that they connect the first and second conductive vias to both ends of the bi-directional Zener diode region, respectively.

摘要翻译： 发光器件封装包括：具有彼此相对的第一和第二表面的未掺杂的半导体衬底; 穿过未掺杂的半导体衬底的第一和第二导电通孔; 安装在所述第一表面的一个区域上的发光器件; 通过在未掺杂的半导体衬底的第二表面上掺杂杂质并在两个方向上具有齐纳击穿电压形成的双向齐纳二极管; 以及形成在未掺杂的半导体衬底的第二表面上的第一和第二外部电极，使得它们分别将第一和第二导电通孔连接到双向齐纳二极管区域的两端。

公开(公告)号：US20100105159A1

公开(公告)日：2010-04-29

申请号：US12648787

申请日：2009-12-29

申请人： Cheol Kyu KIM ,  Yung Ho Ryu ,  Soo Min Lee ,  Jong In Yang ,  Tae Hyung Kim

发明人： Cheol Kyu KIM ,  Yung Ho Ryu ,  Soo Min Lee ,  Jong In Yang ,  Tae Hyung Kim

IPC分类号： H01L33/00 ,  C30B25/02

CPC分类号： H01L29/2003 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/02664 ,  H01L33/0075

摘要： A nitride semiconductor single crystal substrate, a manufacturing method thereof and a method for manufacturing a vertical nitride semiconductor device using the same. According to an aspect of the invention, in the nitride semiconductor single crystal substrate, upper and lower regions are divided along a thickness direction, the nitride single crystal substrate having a thickness of at least 100 μm. Here, the upper region has a doping concentration that is five times or greater than that of the lower region. Preferably, a top surface of the substrate in the upper region has Ga polarity. Also, according to a specific embodiment of the invention, the lower region is intentionally un-doped and the upper region is n-doped. Preferably, each of the upper and lower regions has a doping concentration substantially identical in a thickness direction.

摘要翻译： 氮化物半导体单晶衬底，其制造方法和使用其的垂直氮化物半导体器件的制造方法。 根据本发明的一个方面，在氮化物半导体单晶衬底中，沿着厚度方向分割上部和下部区域，所述氮化物单晶衬底的厚度至少为100μm。 这里，上部区域的掺杂浓度为下部区域的5倍以上。 优选地，上部区域中的基板的顶表面具有Ga极性。 此外，根据本发明的具体实施例，下部区域有意地未掺杂，并且上部区域是n掺杂的。 优选地，上部区域和下部区域中的每一个具有在厚度方向上基本相同的掺杂浓度。

公开(公告)号：US07859086B2

公开(公告)日：2010-12-28

申请号：US11723065

申请日：2007-03-16

申请人： Cheol Kyu Kim ,  Yung Ho Ryu ,  Soo Min Lee ,  Jong In Yang ,  Tae Hyung Kim

发明人： Cheol Kyu Kim ,  Yung Ho Ryu ,  Soo Min Lee ,  Jong In Yang ,  Tae Hyung Kim

IPC分类号： H01L33/00 ,  H01L29/04 ,  H01L29/12

CPC分类号： H01L29/2003 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/02664 ,  H01L33/0075

摘要： A nitride semiconductor single crystal substrate, a manufacturing method thereof and a method for manufacturing a vertical nitride semiconductor device using the same. According to an aspect of the invention, in the nitride semiconductor single crystal substrate, upper and lower regions are divided along a thickness direction, the nitride single crystal substrate having a thickness of at least 100 μm. Here, the upper region has a doping concentration that is five times or greater than that of the lower region. Preferably, a top surface of the substrate in the upper region has Ga polarity. Also, according to a specific embodiment of the invention, the lower region is intentionally un-doped and the upper region is n-doped. Preferably, each of the upper and lower regions has a doping concentration substantially identical in a thickness direction.

摘要翻译： 氮化物半导体单晶衬底，其制造方法和使用其的垂直氮化物半导体器件的制造方法。 根据本发明的一个方面，在氮化物半导体单晶衬底中，沿着厚度方向分割上部和下部区域，所述氮化物单晶衬底的厚度至少为100μm。 这里，上部区域的掺杂浓度为下部区域的5倍以上。 优选地，上部区域中的基板的顶表面具有Ga极性。 此外，根据本发明的具体实施例，下部区域有意地未掺杂，并且上部区域是n掺杂的。 优选地，上部区域和下部区域中的每一个具有在厚度方向上基本相同的掺杂浓度。

公开(公告)号：US20070215983A1

公开(公告)日：2007-09-20

申请号：US11723065

申请日：2007-03-16

申请人： Cheol Kyu Kim ,  Yung Ho Ryu ,  Soo Min Lee ,  Jong In Yang ,  Tae Hyung Kim

发明人： Cheol Kyu Kim ,  Yung Ho Ryu ,  Soo Min Lee ,  Jong In Yang ,  Tae Hyung Kim

IPC分类号： H01L29/12

CPC分类号： H01L29/2003 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/02664 ,  H01L33/0075

摘要： A nitride semiconductor single crystal substrate, a manufacturing method thereof and a method for manufacturing a vertical nitride semiconductor device using the same. According to an aspect of the invention, in the nitride semiconductor single crystal substrate, upper and lower regions are divided along a thickness direction, the nitride single crystal substrate having a thickness of at least 100 μm. Here, the upper region has a doping concentration that is five times or greater than that of the lower region. Preferably, a top surface of the substrate in the upper region has Ga polarity. Also, according to a specific embodiment of the invention, the lower region is intentionally un-doped and the upper region is n-doped. Preferably, each of the upper and lower regions has a doping concentration substantially identical in a thickness direction.

摘要翻译： 氮化物半导体单晶衬底，其制造方法和使用其的垂直氮化物半导体器件的制造方法。 根据本发明的一个方面，在氮化物半导体单晶衬底中，沿厚度方向分割上下区域，氮化物单晶衬底的厚度至少为100μm。 这里，上部区域的掺杂浓度为下部区域的5倍以上。 优选地，上部区域中的基板的顶表面具有Ga极性。 此外，根据本发明的具体实施例，下部区域有意地未掺杂，并且上部区域是n掺杂的。 优选地，上部区域和下部区域中的每一个具有在厚度方向上基本相同的掺杂浓度。

公开(公告)号：US08334156B2

公开(公告)日：2012-12-18

申请号：US12648787

申请日：2009-12-29

申请人： Cheol Kyu Kim ,  Yung Ho Ryu ,  Soo Min Lee ,  Jong In Yang ,  Tae Hyung Kim

发明人： Cheol Kyu Kim ,  Yung Ho Ryu ,  Soo Min Lee ,  Jong In Yang ,  Tae Hyung Kim

IPC分类号： H01L21/205

CPC分类号： H01L29/2003 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/02664 ,  H01L33/0075

摘要： A nitride semiconductor single crystal substrate, a manufacturing method thereof and a method for manufacturing a vertical nitride semiconductor device using the same. According to an aspect of the invention, in the nitride semiconductor single crystal substrate, upper and lower regions are divided along a thickness direction, the nitride single crystal substrate having a thickness of at least 100 μm. Here, the upper region has a doping concentration that is five times or greater than that of the lower region. Preferably, a top surface of the substrate in the upper region has Ga polarity. Also, according to a specific embodiment of the invention, the lower region is intentionally un-doped and the upper region is n-doped. Preferably, each of the upper and lower regions has a doping concentration substantially identical in a thickness direction.

摘要翻译： 氮化物半导体单晶衬底，其制造方法和使用其的垂直氮化物半导体器件的制造方法。 根据本发明的一个方面，在氮化物半导体单晶衬底中，沿着厚度方向分割上部和下部区域，所述氮化物单晶衬底的厚度至少为100μm。 这里，上部区域的掺杂浓度为下部区域的5倍以上。 优选地，上部区域中的基板的顶表面具有Ga极性。 此外，根据本发明的具体实施例，下部区域有意地未掺杂，并且上部区域是n掺杂的。 优选地，上部区域和下部区域中的每一个具有在厚度方向上基本相同的掺杂浓度。

公开(公告)号：US07473571B2

公开(公告)日：2009-01-06

申请号：US11541674

申请日：2006-10-03

申请人： Hae Yeon Hwang ,  Yung Ho Ryu ,  Da Mi Shim ,  Se Hwan Ahn

发明人： Hae Yeon Hwang ,  Yung Ho Ryu ,  Da Mi Shim ,  Se Hwan Ahn

IPC分类号： H01L21/00

CPC分类号： H01L33/0079 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2924/00

摘要： There is provided a method for manufacturing a vertically structured LED capable of performing a chip separation process with ease. In the method, a light-emitting structure is formed on a growth substrate having a plurality of device regions and at least one device isolation region, wherein the light-emitting structure has an n-type clad layer, an active layer and a p-type clad layer which are disposed on the growth substrate in sequence. A p-electrode is formed on the light-emitting structure. Thereafter, a first plating layer is formed on the p-electrode such that it connects the plurality of device isolation regions. A pattern of a second plating layer is formed on the first plating layer of the device region. The growth substrate is removed, and an n-electrode is then formed on the n-type clad layer.

摘要翻译： 提供了一种制造能够容易地进行芯片分离处理的垂直结构的LED的方法。 在该方法中，在具有多个器件区域和至少一个器件隔离区域的生长衬底上形成发光结构，其中，所述发光结构体具有n型覆盖层，有源层和p- 型覆盖层依次设置在生长基板上。 在发光结构上形成p电极。 此后，在p电极上形成第一镀层，使得它连接多个器件隔离区。 在器件区域的第一镀层上形成第二镀层的图案。 去除生长衬底，然后在n型覆盖层上形成n电极。

公开(公告)号：US08581293B2

公开(公告)日：2013-11-12

申请号：US13223877

申请日：2011-09-01

申请人： Yung Ho Ryu ,  Hae Yeon Hwang ,  Young Chul Shin

发明人： Yung Ho Ryu ,  Hae Yeon Hwang ,  Young Chul Shin

IPC分类号： H01L29/43

CPC分类号： H01L33/38 ,  H01L27/153 ,  H01L33/08 ,  H01L33/20 ,  H01L33/387 ,  H01L33/42 ,  H01L33/44 ,  H01L33/62

摘要： A semiconductor light emitting device includes: a first conductive semiconductor layer including first and second areas; an active layer disposed on the second area; a second conductive semiconductor layer disposed on the active layer; first and second electrode branches disposed on the first and second conductive semiconductor layers, respectively; a first electrode pad electrically connected to the first electrode branch and disposed on the first electrode branch; and a second electrode pad electrically connected to the second electrode branch and disposed on the second electrode branch.

公开(公告)号：US07442565B2

公开(公告)日：2008-10-28

申请号：US11522407

申请日：2006-09-18

申请人： Yung Ho Ryu ,  Hae Youn Hwang

发明人： Yung Ho Ryu ,  Hae Youn Hwang

IPC分类号： H01L21/00

CPC分类号： H01L33/0079 ,  H01L33/62 ,  H01L33/64 ,  H01L2924/0002 ,  H01L2933/0075 ,  H01L2924/00

摘要： A method for manufacturing a vertical light emitting diode of the invention allows an easier process of individually separating chips. A light emitting structure is formed on a growth substrate having a plurality of device areas and at least one device isolation area. The light emitting structure has an n-type clad layer, an active layer and a p-type clad layer sequentially formed therein. Corresponding p-type electrodes are formed on the light emitting structure on the device areas. A glass substrate having through holes perforated therein is provided on the p-electrodes so that the through holes are disposed corresponding to the p-electrodes. Also, the through holes are plated with a metal material to form patterns of a plating layer on the p-electrodes. Then, the growth substrate is removed to form n-electrodes on the n-type clad layer. The glass substrate is removed via etching.

摘要翻译： 本发明的垂直发光二极管的制造方法能够容易地分离芯片。 在具有多个器件区域和至少一个器件隔离区域的生长衬底上形成发光结构。 发光结构具有依次形成的n型覆盖层，有源层和p型覆盖层。 相应的p型电极形成在器件区域上的发光结构上。 在p电极上设置有在其上穿孔的玻璃基板，使得贯通孔对应于p电极。 此外，通孔用金属材料镀覆以在p电极上形成电镀层的图案。 然后，去除生长衬底以在n型覆盖层上形成n电极。 通过蚀刻去除玻璃基板。

公开(公告)号：US07078256B2

公开(公告)日：2006-07-18

申请号：US10875321

申请日：2004-06-25

申请人： Yung Ho Ryu ,  Kee Jeong Yang ,  Bang Won Oh ,  Jin Sub Park ,  Young Hoon Kim

发明人： Yung Ho Ryu ,  Kee Jeong Yang ,  Bang Won Oh ,  Jin Sub Park ,  Young Hoon Kim

IPC分类号： H01L21/00

CPC分类号： H01L33/007

摘要： A nitride semiconductor LED improved in lighting efficiency and a fabrication method thereof, in which an n-doped semiconductor layer is formed on a substrate. An active layer is formed on the n-doped semiconductor layer to expose at least a partial area of the n-doped semiconductor layer. A p-doped semiconductor layer is formed on the active layer. A p+-doped semiconductor layer is formed on the p-doped semiconductor layer. An n+-doped semiconductor layer is formed in at least a partial upper region of the p+-doped semiconductor layer via n-dopant ion implantation. The n+-doped semiconductor layer cooperates with an underlying partial region of the p+-doped semiconductor layer to realize a reverse bias tunneling junction. Also, an upper n-doped semiconductor layer is formed on the n+-doped semiconductor layer to realize lateral current spreading. The invention can improve lighting efficiency by using the reverse bias tunneling junction and/or the lateral current spreading.