公开(公告)号：US06919147B2

公开(公告)日：2005-07-19

申请号：US10254405

申请日：2002-09-25

Applicant: Josef Mathuni ,  Gunther Ruhl

Inventor： Josef Mathuni ,  Gunther Ruhl

IPC: C03C17/34 ,  C03C17/36 ,  G03F1/00 ,  G03F1/32 ,  G03F1/80 ,  G03F1/08 ,  C23F1/00

CPC classification number: C03C17/3607 ,  C03C17/3435 ,  C03C17/36 ,  C03C17/3626 ,  C03C2218/33 ,  C03C2218/34 ,  G03F1/32 ,  G03F1/80

Abstract: The present invention provides a production method for a halftone phase mask which has an SiO2 substrate, an overlying refractory metal SixNy phase shifter layer (2) and an overlying chromium oxide or chromium mask layer (3), having the following steps: provision of a mask (4) on the chromium oxide or chromium mask layer (3); etching of the chromium oxide or chromium mask layer (3) for the purpose of forming a hard mask from the chromium oxide or chromium mask layer (3) in a first etching step; selective etching of the refractory metal SixNy phase shifter layer (2) using the hard mask in a plasma with a chlorine-containing and/or hydrogen-chloride-containing main gas in a second etching step with a predetermined cathode power of at least 20 W.

Abstract translation: 本发明提供了一种半色调相位掩模的制造方法，其具有SiO 2衬底，上覆难熔金属Si x N N y Y y移相器 层（2）和上覆的氧化铬或铬掩模层（3），具有以下步骤：在氧化铬或铬掩模层（3）上设置掩模（4）; 在第一蚀刻步骤中，为了从氧化铬或铬掩模层（3）形成硬掩模，蚀刻氧化铬或铬掩模层（3） 使用具有含氯和/或含氯化氢的等离子体中的硬掩模选择性蚀刻难熔金属Si x N y Y y移相层（2） 在第二蚀刻步骤中的主气体具有至少20W的预定阴极功率

公开(公告)号：US4390394A

公开(公告)日：1983-06-28

申请号：US338605

申请日：1982-01-11

Applicant: Josef Mathuni ,  Karin Unger

Inventor： Josef Mathuni ,  Karin Unger

IPC: H01L21/302 ,  G03F7/09 ,  G03F7/40 ,  H01L21/033 ,  H01L21/3065 ,  C23F1/02 ,  B44C1/22 ,  C03C15/00 ,  C03C25/06

CPC classification number: H01L21/0332 ,  G03F7/094 ,  G03F7/40 ,  Y10S438/949 ,  Y10S438/95

Abstract: Very fine circuit structures in microelectronics are produced by first applying a thin metal oxide layer uniformly over an entire surface of a layer to be etched, then applying a resist layer uniformly over the entire metal oxide layer and structuring such oxide layer by ion-beam etching and, utilizing the structured oxide layer as a mask, performing a dry-etching with an ion beam of the metal layer lying thereunder so as to attain structures having very unfavorable resist height to etching depth ratios.

Abstract translation: 通过首先在待蚀刻层的整个表面上均匀地施加薄的金属氧化物层，然后在整个金属氧化物层上均匀地施加抗蚀剂层并通过离子束蚀刻来构造这样的氧化物层来生产微电子中的非常精细的电路结构 并且利用结构化氧化物层作为掩模，利用其下面的金属层的离子束进行干蚀刻，以获得对蚀刻深度比非常不利的抗蚀剂高度的结构。

公开(公告)号：US07063921B2

公开(公告)日：2006-06-20

申请号：US10667552

申请日：2003-09-22

Applicant: Wolfgang Dettman ,  Josef Mathuni ,  Oliver Fagerer ,  Bettina Schiessl ,  Stephen Rahn

Inventor： Wolfgang Dettman ,  Josef Mathuni ,  Oliver Fagerer ,  Bettina Schiessl ,  Stephen Rahn

IPC: G01F9/00 ,  G03C5/00

CPC classification number: G03F1/34 ,  G03F1/30 ,  G03F1/36 ,  G03F1/40 ,  Y10T403/5773

Abstract: The invention relates to a method for the production of masks, in particular for the production of alternating phase shift masks (1), or of chromeless phase shift masks or phase shift masks structured by quartz etching, respectively, as well as to a mask (1), in particular photomask, for the production of semiconductor devices, comprising at least one product field area (6a) and a compensation structure (5) positioned outside the product field area (6a), wherein the compensation structure (5) comprises at least one electroconductive region (8b) that is electrically connected with the product field area (6a).

Abstract translation: 本发明涉及一种用于制造掩模的方法，特别是用于生产交替相移掩模（1）或由石英蚀刻构成的无铬相移掩模或相移掩模以及掩模（ 1），特别是光掩模，用于生产半导体器件，包括至少一个产品场区（6a）和位于产品场区（6a）外部的补偿结构（5），其中补偿结构（5） 包括与产品场区域（6a）电连接的至少一个导电区域（8b）。

公开(公告)号：US5693182A

公开(公告)日：1997-12-02

申请号：US604643

申请日：1996-02-21

Applicant: Josef Mathuni

Inventor： Josef Mathuni

IPC: C23F4/00 ,  H01L21/301 ,  H01L21/302 ,  H01L21/304 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/78 ,  H01L21/00

CPC classification number: H01L21/3086 ,  H01L21/308 ,  H01L21/3081 ,  H01L21/78

Abstract: A method for making large scale integrated circuits on a disklike semiconductor substrate includes grinding a disk thin enough to be able to be sawn apart into individual chips. A damage zone caused by the grinding on a back side of the wafer is removed by etching while protecting a front side of the wafer, prior to sawing. The etching is carried out in the form of a microwave or high-frequency-excited downstream plasma etching process using fluorine compounds in an etching gas.

Abstract translation: 一种在盘状半导体衬底上制造大规模集成电路的方法包括：将足够薄的盘研磨成可分离成独立的芯片。 在切割之前，通过蚀刻除去晶片背侧的研磨引起的损伤区域，同时保护晶片的前侧。 蚀刻以蚀刻气体中的氟化合物的微波或高频激发下游等离子体蚀刻工艺的形式进行。

公开(公告)号：US08815746B2

公开(公告)日：2014-08-26

申请号：US13599985

申请日：2012-08-30

Applicant: Josef Mathuni

Inventor： Josef Mathuni

IPC: G01L21/30 ,  G01R31/00 ,  H01L21/302 ,  H01L21/461 ,  B44C1/22 ,  C03C15/00 ,  C03C25/68 ,  C23F1/00

CPC classification number: B81C99/0085 ,  B81C2201/032 ,  H01J37/32357

Abstract: An apparatus and the use of such an apparatus and method for producing microcomponents with component structures are presented which are generated in a process chamber on a substrate according to the LIGA method for example and are stripped from the enclosing photoresist with the help of a cooled remote plasma source.

Abstract translation: 本发明提供了一种用于制造具有部件结构的微型部件的这种装置和方法的使用方法，其在例如基于LIGA方法的基板上的处理室中产生，并且借助于冷却的远程 等离子体源

公开(公告)号：US07071110B2

公开(公告)日：2006-07-04

申请号：US10356106

申请日：2003-01-31

Applicant: Josef Mathuni ,  Günther Ruhl

Inventor： Josef Mathuni ,  Günther Ruhl

IPC: H01L21/311

CPC classification number: H01L21/32131 ,  G03F1/80

Abstract: A process enables plasma etching of materials that do not contain silicon. The process is particularly suitable for the side wall passivation of chromium layers in masks for fabricating semiconductor components. The plasma contains oxygen and/or nitrogen, and at least one silicon-donating compound is introduced into the plasma. This allows efficient passivation of side walls.

公开(公告)号：US5874366A

公开(公告)日：1999-02-23

申请号：US863371

申请日：1997-05-27

Applicant: Roland Sporer ,  Josef Mathuni ,  Alexander Gschwandtner

Inventor： Roland Sporer ,  Josef Mathuni ,  Alexander Gschwandtner

IPC: H01L21/306 ,  H01L21/00

CPC classification number: H01L21/02052

Abstract: The method and system of the invention allow etching even relatively thick layers on the rear side of a semiconductor substrate where the front side is resist-free. An etching solution is sprayed in fine droplets onto the rear side of the semiconductor substrate. The semiconductor substrate may thereby be heated to a temperature .ltoreq.100.degree. C.

Abstract translation: 本发明的方法和系统允许在半导体衬底的背面没有抗蚀剂的情况下蚀刻甚至相当厚的层。 蚀刻溶液以细小的液滴喷射到半导体衬底的后侧。 因此可以将半导体衬底加热到​​100℃的温度。

公开(公告)号：US20060290301A1

公开(公告)日：2006-12-28

申请号：US11450871

申请日：2006-06-12

Applicant: Alexander Gschwandtner ,  Josef Mathuni ,  Alexander Mattheus ,  Stephan Schneider ,  Jurgen Sellmaier ,  Heinz Steinhardt

Inventor： Alexander Gschwandtner ,  Josef Mathuni ,  Alexander Mattheus ,  Stephan Schneider ,  Jurgen Sellmaier ,  Heinz Steinhardt

IPC: H05H7/00

CPC classification number: H01J37/32192 ,  H05H1/30

Abstract: An apparatus is described for generating excited and/or ionized particles in a plasma with a generator for generating an electromagnetic wave and an excitation chamber with a plasma zone in which the excited and/or ionized particles are formed. At least one excitation chamber is arranged in an insulating material off-center relative to a ring-cylindrical outer conductor.

Abstract translation: 描述了一种用于产生电磁波的发生器的等离子体中产生激发和/或离子化的颗粒的装置，以及具有形成激发和/或离子化的颗粒的等离子体区域的激发室。 至少一个激励室相对于环形圆柱形外部导体偏心地布置在绝缘材料中。

公开(公告)号：US06706141B1

公开(公告)日：2004-03-16

申请号：US09625200

申请日：2000-07-21

Applicant: Heinz Steinhardt ,  Alexander Gschwandtner ,  Josef Mathuni

Inventor： Heinz Steinhardt ,  Alexander Gschwandtner ,  Josef Mathuni

IPC: H05H100

CPC classification number: H01J37/32229 ,  H01J37/32357 ,  H05H1/46

Abstract: A device to generate excited and/or ionized particles in plasma with a generator to generate an electromagnetic wave and at least one plasma zone, in which the excited and/or ionized particles are formed by the electromagnetic wave. The plasma zone is formed in an interior chamber of a conductor for the electromagnetic wave.

Abstract translation: 一种用发生器产生等离子体中的激发和/或电离粒子以产生电磁波和至少一个等离子体区域的装置，其中激发和/或离子化的颗粒由电磁波形成。 等离子体区域形成在用于电磁波的同轴导体的内部室中。

公开(公告)号：US06569772B2

公开(公告)日：2003-05-27

申请号：US10075540

申请日：2002-02-14

Applicant: Josef Mathuni ,  Jürgen Knobloch ,  Christoph Nölscher

Inventor： Josef Mathuni ,  Jürgen Knobloch ,  Christoph Nölscher

IPC: H01L21311

CPC classification number: G03F1/30

Abstract: A carrier has a surface with a mask layer thereon. An irradiation-sensitive layer on the mask layer is exposed and developed to form a first exposure structure. The first exposure structure is used as an etching mask while the mask layer is etched. The first exposure structure is subsequently removed. A second irradiation-sensitive layer is applied to the mask layer and the carrier. The second irradiation-sensitive layer is exposed with a first exposure dose and a second exposure dose. The second irradiation-sensitive layer is subsequently developed to form a second exposure structure with a first and second exposure structure thickness. The carrier is etched down to a first etching depth in the region of the first exposure structure thickness and down to a second etching depth in the region of the second exposure structure thickness. The first etching depth is larger than the second etching depth.