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    Method for controlling an electrical light source by pulse width modulation
    3.
    发明授权
    Method for controlling an electrical light source by pulse width modulation 有权
    通过脉宽调制控制电光源的方法

    公开(公告)号：US07888890B2

    公开(公告)日：2011-02-15

    申请号：US11661663

    申请日：2005-07-14

    申请人： Uli Joos ,  Christian Voss ,  Josef Schnell ,  Jochen Zwick

    发明人： Uli Joos ,  Christian Voss ,  Josef Schnell ,  Jochen Zwick

    IPC分类号： H05B41/36

    CPC分类号： H05B33/0851 ,  H05B33/0818 ,  H05B39/047 ,  Y02B20/346

    摘要： A method for controlling electrical light sources, in particular, light-emitting diodes (LEDs) by pulse width modulation of a supply voltage is disclosed, whereby the supply voltage or a parameter dependent thereon, for example the current or the electrical power, is measured and the pulse width is controlled as a function thereof. According to the invention, for the light source a characteristic curve for the brightness is generated as a function of the supply voltage or the parameter dependent thereon and, from the measured supply voltage or the parameter dependent thereon, an actual brightness value is determined with the characteristic curve and is compared with a given brightness value and the pulse width controlled as a function thereof.

    摘要翻译： 公开了一种通过电源电压的脉冲宽度调制来控制电光源，特别是发光二极管（LED）的方法，由此测量电源电压或其所依赖的参数，例如电流或电功率 并且作为其功能控制脉冲宽度。 根据本发明，对于光源，根据供电电压或依赖于其的参数产生亮度的特性曲线，并且根据所测量的电源电压或依赖于其的参数，实际亮度值由 特性曲线，并与给定的亮度值进行比较，其脉冲宽度作为其功能受到控制。

    Memory with clock distribution options
    7.
    发明申请
    Memory with clock distribution options 审中-公开
    内存带时钟分配选项

    公开(公告)号：US20080137471A1

    公开(公告)日：2008-06-12

    申请号：US11635189

    申请日：2006-12-07

    申请人： Josef Schnell ,  Farrukh Aquil

    发明人： Josef Schnell ,  Farrukh Aquil

    IPC分类号： G11C7/22

    CPC分类号： G11C7/1078 ,  G06F1/10 ,  G11C5/063 ,  G11C7/1066 ,  G11C7/22 ,  G11C7/225 ,  G11C11/4076 ,  G11C11/4093

    摘要： One embodiment provides a memory including a first receiver, a second receiver, a circuit, a first buffer, and a second buffer. The first receiver is situated on one side of the memory and configured to receive a first clock signal and provide a first clock tree signal. The second receiver is situated on another side of the memory and configured to receive a second clock signal and provide a second clock tree signal. The circuit is configured to receive the first clock tree signal and provide a distributed clock signal. The first buffer is configured to selectively provide one of the first clock tree signal and the distributed clock signal to the one side of the memory and the second buffer is configured to selectively provide one of the second clock tree signal and the distributed clock signal to the other side of the memory.

    摘要翻译： 一个实施例提供了包括第一接收器，第二接收器，电路，第一缓冲器和第二缓冲器的存储器。 第一接收器位于存储器的一侧，并被配置为接收第一时钟信号并提供第一时钟树信号。 第二接收器位于存储器的另一侧，并被配置为接收第二时钟信号并提供第二时钟树信号。 电路被配置为接收第一时钟树信号并提供分布式时钟信号。 第一缓冲器被配置为选择性地将第一时钟树信号和分布式时钟信号之一提供给存储器的一侧，并且第二缓冲器被配置为选择性地将第二时钟树信号和分布式时钟信号中的一个提供给 记忆的另一面。

    Boosted clock circuit for semiconductor memory
    8.
    发明授权
    Boosted clock circuit for semiconductor memory 有权
    用于半导体存储器的升压时钟电路

    公开(公告)号：US07376042B2

    公开(公告)日：2008-05-20

    申请号：US11492636

    申请日：2006-07-25

    申请人： Josef Schnell ,  Helmut Seitz

    发明人： Josef Schnell ,  Helmut Seitz

    IPC分类号： G11C8/00 ,  G11C5/14 ,  G11C7/00

    CPC分类号： G11C7/1072 ,  G11C7/222

    摘要： A memory component includes at least one memory bank array, a DQ region, a clock tree, and a voltage generator. The memory component is configured in a semiconductor wafer. The at least one memory bank array is configured such that data is read out of it during a read operation. The clock tree is coupled to the DQ region and is configured for driving data during the read operation. The voltage generator is coupled to at least some components of the clock tree in order to provide at least some of the components of the clock tree with an increased voltage.

    摘要翻译： 存储器组件包括至少一个存储体阵列，DQ区，时钟树和电压发生器。 存储器部件配置在半导体晶片中。 至少一个存储体阵列被配置为使得在读取操作期间从其读出数据。 时钟树耦合到DQ区，并且被配置为在读取操作期间驱动数据。 电压发生器耦合到时钟树的至少一些组件，以便提供时钟树的至少一些组件具有增加的电压。

    Power Switching Apparatus With Overload Protection
    9.
    发明申请
    Power Switching Apparatus With Overload Protection 有权
    具有过载保护功能的开关装置

    公开(公告)号：US20080055807A1

    公开(公告)日：2008-03-06

    申请号：US11576135

    申请日：2004-09-28

    申请人： Laurent Guillot ,  Phillippe Rosado ,  Pierre Turpin ,  Francoise Vareilhias ,  Uli Joos ,  Josef Schnell

    发明人： Laurent Guillot ,  Phillippe Rosado ,  Pierre Turpin ,  Francoise Vareilhias ,  Uli Joos ,  Josef Schnell

    IPC分类号： H02H3/06 ,  H02H3/08

    CPC分类号： H02H3/06 ,  H02H3/006

    摘要： Power supply apparatus with overload protection comprising a switch responsive to an input signal for switching between an ON-state for supplying current from a source of power to a load and an OFF-state for interrupting the supply of current to the load, and protection means responsive to an overload condition to switch the switch to the OFF-state. The protection means is responsive to a first overload condition during an initial phase after the switch switches to the ON-state so as to switch the switch back to the OFF-state and maintain the switch in the OFF-state. The protection means is subsequently responsive to a second overload condition if the first overload condition is not detected during the initial phase so as to switch the switch to the OFF-state and subsequently switch the switch back to the ON-state after an interval of time. The protection means is responsive to the current exceeding a first threshold value in detecting the first overload condition, and is responsive to the current exceeding a second threshold value in detecting the second overload condition, the second threshold value being lower than the first threshold value. The protection means is responsive to a temperature of the switch means exceeding a temperature threshold value in detecting at least the first overload condition.

    摘要翻译： 具有过载保护的电源设备包括响应于输入信号的开关，用于在从电源提供电流到负载的电流的接通状态和用于中断向负载提供电流的断开状态之间切换;以及保护装置 响应于过载条件将开关切换到OFF状态。 保护装置在开关切换到接通状态之后的初始阶段期间响应于第一过载状况，以将开关切换回关断状态并将开关保持在关闭状态。 如果在初始阶段期间没有检测到第一过载条件，则保护装置随后响应于第二过载状况，以便将开关切换到关闭状态，并且随后在一段时间之后将开关切换回接通状态 。 在检测到第一过载状态时，保护装置响应于超过第一阈值的电流，并且响应于在检测到第二过载状况时超过第二阈值的电流，第二阈值低于第一阈值。 至少在检测到第一过载条件时，保护装置响应于开关装置的温度超过温度阈值。

    Method for pulse width modulated control of a plurality of load elements
    10.
    发明申请
    Method for pulse width modulated control of a plurality of load elements 有权
    多个负载元件的脉冲宽度调制控制方法

    公开(公告)号：US20070132316A1

    公开(公告)日：2007-06-14

    申请号：US10582460

    申请日：2004-12-10

    申请人： Uli Joos ,  Josef Schnell

    发明人： Uli Joos ,  Josef Schnell

    IPC分类号： H02J3/14

    CPC分类号： B60R16/0315 ,  Y10T307/406 ,  Y10T307/484

    摘要： Disclosed is a method for pulse width modulated control of a plurality of load elements, particularly during supply of the load elements from a common supply system in motor vehicles. The load elements are controlled in a time staggered manner with respect to one another, more particularly in a phase staggered manner within a common pulse width. Switch loads and high frequency interferences in the supply lines and the corresponding emissions can thus be reduced. The invention also discloses a circuit arrangement in which a corresponding phase staggered control is achieved with only one counter.

    摘要翻译： 公开了一种用于多个负载元件的脉冲宽度调制控制的方法，特别是在来自机动车辆中的公共供应系统的负载元件的供给期间。 负载元件以相对于彼此的时间交错方式被控制，更具体地以公共脉冲宽度内的相位交错方式进行控制。 因此可以减少供电线路中的开关负载和高频干扰以及相应的发射。 本发明还公开了一种电路装置，其中仅使用一个计数器实现相应的相位交错控制。