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1.
公开(公告)号:US4958202A
公开(公告)日:1990-09-18
申请号:US382345
申请日:1989-07-20
IPC分类号: H01S5/227
CPC分类号: H01S5/227 , H01S5/2277 , Y10S148/05 , Y10S148/051 , Y10S148/066 , Y10S148/095 , Y10T29/413
摘要: An active layer is formed on an n-type InP buffer layer of a substrate. A pair of strip-shaped grooves are formed into the active layer to divide it into a contract portion and side portions. A p-type InP cladding layer is deposited on the entire surface of the active layer and grooves. The cladding layer is selectively etched to form a mesa portion including the central active portion and expose the buffer layer. An insulating film is coated on the mesa portion and buffer layer, so that a semiconductor light-emitting device is manufactured.
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2.
公开(公告)号:US4870468A
公开(公告)日:1989-09-26
申请号:US95114
申请日:1987-09-11
IPC分类号: H01S5/227
CPC分类号: H01S5/227 , H01S5/2277 , Y10S148/05 , Y10S148/051 , Y10S148/066 , Y10S148/095 , Y10T29/413
摘要: An active layer is formed on an n-type InP buffer layer of a substrate. A pair of strip-shaped grooves are formed into the active layer to divide it into a contract portion and side portions. A p-type Inp cladding layer is deposited on the entire surface of the active layer and grooves. The cladding layer is selectively etched to form a mesa portion including the central active portion and expose the buffer layer. An insulating film is coated on the mesa portion and buffer layer, so that a semiconductor light-emitting device is manufactured.
摘要翻译: 在衬底的n型InP缓冲层上形成有源层。 一对带状槽形成有源层,以将其分成收缩部分和侧部。 在有源层和沟槽的整个表面上沉积p型Inp覆层。 选择性地蚀刻包覆层以形成包括中心活性部分的台面部分并暴露缓冲层。 在台面部分和缓冲层上涂布绝缘膜,制成半导体发光元件。
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公开(公告)号:US4974233A
公开(公告)日:1990-11-27
申请号:US383100
申请日:1989-07-21
申请人: Nobuo Suzuki , Motoyasu Morinaga , Hideto Furuyama , Yuzo Hirayama , Hajime Okuda , Masaru Nakamura , Nawoto Motegi
发明人: Nobuo Suzuki , Motoyasu Morinaga , Hideto Furuyama , Yuzo Hirayama , Hajime Okuda , Masaru Nakamura , Nawoto Motegi
CPC分类号: H01S5/0422 , H01S5/026 , H01S5/227 , H01S5/0208 , H01S5/0425 , H01S5/2275 , H01S5/2277 , H01S5/32391
摘要: A semiconductor laser device comprises a semiconductor mesa portion formed above semiconductor substrate by a predetermined interval, an active region, formed between the mesa portion and semiconductor substrate and consisting of a semiconductor having a forbidden band width smaller than those of the mesa portion and semiconductor substrate, for contributing to light emission, a pair of buried portions formed at both sides in a widthwise direction of and in contact with the active region and consisting of a semiconductor having a forbidden band width larger than that of the active region, a total width of the buried portions and the active region being smaller than that of the mesa portion, thereby forming a gap at a side of each of the buried portions between the mesa portion and semiconductor substrate to electrically insulate the mesa portion and semiconductor substrate, and supporting portions formed integrally with the mesa portion so as to support the mesa portion with respect to the substrate in association with the active region and the buried portions.
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公开(公告)号:US4862474A
公开(公告)日:1989-08-29
申请号:US198866
申请日:1988-05-26
申请人: Motoyasu Morinaga , Hideto Furuyama , Masaru Nakamura , Nobuo Suzuki , Yuzo Hirayama , Hajime Okuda
发明人: Motoyasu Morinaga , Hideto Furuyama , Masaru Nakamura , Nobuo Suzuki , Yuzo Hirayama , Hajime Okuda
CPC分类号: H01S5/026 , H01S5/0422 , H01S5/227 , H01S5/0208 , H01S5/0425 , H01S5/2275 , H01S5/2277 , H01S5/32391
摘要: A semiconductor laser device comprises a substrate having an n-type buffer layer, a semiconductor laser element and auxiliary element, provided side by side on the buffer layer. The semiconductor laser element includes a mesa portion having a p-type low resistant semiconductor region provided above the buffer layer, an active region consisting of a semiconductor formed on the buffer layer and low resistant region, a pair of buried portions integrally formed with the low resistive region and formed on and contiguous to opposite sides of the active region in the width direction. A lateral hole is provided between the buffer layer and low resistive region on the side of buried portion. The auxiliary element includes a high resistive regions integrally formed with the low resistant region and positioned on the sides of low resistive region.
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公开(公告)号:US4858241A
公开(公告)日:1989-08-15
申请号:US198859
申请日:1988-05-26
申请人: Nobuo Suzuki , Motoyasu Morinaga , Hideto Furuyama , Yuzo Hirayama , Hajime Okuda , Masaru Nakamura , Nawoto Motegi
发明人: Nobuo Suzuki , Motoyasu Morinaga , Hideto Furuyama , Yuzo Hirayama , Hajime Okuda , Masaru Nakamura , Nawoto Motegi
CPC分类号: H01S5/0422 , H01S5/026 , H01S5/227 , H01S5/0208 , H01S5/0425 , H01S5/2275 , H01S5/2277 , H01S5/32391
摘要: A semiconductor laser device comprises a semiconductor mesa portion formed above semiconductor substrate by a predetermined interval, an active region, formed between the mesa portion and semiconductor substrate and consisting of a semiconductor having a forbidden band width smaller than those of the mesa portion and semiconductor substrate, for contributing to light emission, a pair of buried portions formed at both sides in a widthwise direction of and in contact with the active region and consisting of a semiconductor having a forbidden band width larger than that of the active region, a total width of the buried portions and the active region being smaller than that of the mesa portion, thereby forming a gap at a side of each of the buried portions between the mesa portion and semiconductor substrate to electrically insulate the mesa portion and semiconductor substrate, and supporting portions formed integrally with the mesa portion so as to support the mesa portion with respect to the substrate in association with the active region and the buried portions.
摘要翻译: 一种半导体激光器件,包括在半导体衬底上形成预定间隔的半导体台面部分,形成在台面部分和半导体衬底之间的有源区域,其具有禁带宽度小于台面部分和半导体衬底的宽度的半导体 用于有助于发光的一对掩埋部分,形成在有源区域的宽度方向两侧并且与有源区域接触的一对掩埋部分,并且由禁带宽度大于有源区域的宽度的半导体构成, 埋入部分和有源区域小于台面部分,从而在台面部分和半导体衬底之间的每个掩埋部分的一侧形成间隙,以使台面部分和半导体衬底电绝缘,形成的支撑部分 与台面部分一体地相对于台面部分支撑 与有源区域和掩埋部分相关联的衬底。
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公开(公告)号:US4974232A
公开(公告)日:1990-11-27
申请号:US383099
申请日:1989-07-21
申请人: Motoyasu Morinaga , Hideto Furuyama , Masaru Nakamura , Nobuo Suzuki , Yuzo Hirayama , Hajime Okuda
发明人: Motoyasu Morinaga , Hideto Furuyama , Masaru Nakamura , Nobuo Suzuki , Yuzo Hirayama , Hajime Okuda
CPC分类号: H01S5/026 , H01S5/0422 , H01S5/227 , H01S5/0208 , H01S5/0425 , H01S5/2275 , H01S5/2277 , H01S5/32391
摘要: A semiconductor laser device comprises a substrate having an n-type buffer layer, a semiconductor laser element and auxiliary element, provided side by side on the buffer layer. The semiconductor laser element includes a mesa portion having a p-type low resistant semiconductor region provided above the buffer layer, an active region consisting of a semiconductor formed on the buffer layer and low resistant region, a pair of buried portions integrally formed with the low resistive region and formed on and contiguous to opposite sides of the active region in the width direction. A lateral hole is provided between the buffer layer and low resistive region on the side of buried portion. The auxiliary element includes a high resistive regions integrally formed with the low resistant region and positioned on the sides of low resistive region.
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公开(公告)号:US5084410A
公开(公告)日:1992-01-28
申请号:US257519
申请日:1988-10-14
IPC分类号: H01L21/20 , H01L29/04 , H01L29/10 , H01L31/105 , H01L33/00 , H01S5/22 , H01S5/227 , H01S5/32 , H01S5/323
CPC分类号: H01L21/02639 , H01L21/02392 , H01L21/02543 , H01L21/02546 , H01L21/0262 , H01L29/045 , H01L29/1029 , H01L31/105 , H01L33/0062 , H01S5/2203 , H01S5/227 , H01S5/2201 , H01S5/3202 , H01S5/32391 , Y10S438/973
摘要: A semiconductor device which comprises a semiconductor substrate having a surface orientation substantially in a {100}-orientation is provided. On the semiconductor substrate, plural steps formed in a direction deviated substantially from a -direction by 5 degrees or more are formed. The steps, which are mesa and concave portions, are buried by plural semiconductor crystal layers grown by the use of MOCVD or the like. A method of manufacturing such a device is also provided.
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8.
公开(公告)号:US4676863A
公开(公告)日:1987-06-30
申请号:US806497
申请日:1985-12-09
申请人: Hideto Furuyama , Yuzo Hirayama
发明人: Hideto Furuyama , Yuzo Hirayama
IPC分类号: H01L21/306 , H01L21/308 , H01S5/20 , H01S5/22 , H01S5/227 , H01L21/66
CPC分类号: H01L21/3083 , H01L21/30612 , H01L33/0062 , H01S5/227 , H01S5/2081 , H01S5/2201 , H01S5/2275 , Y10S148/095
摘要: A method of fabricating a semiconductor crystal mesa stripe whose waist section is narrower than the upper plane of said mesa stripe. The method comprises the steps of forming a first striped mask on the semiconductor crystal wafer in order to fabricate a prescribed mesa stripe, linearly arranging a plurality of second striped masks, narrower than said first striped mask by the prescribed waist width of the main mesa stripe, on the semiconductor wafer plane at prescribed intervals and in parallel with said first striped mask in order to fabricate monitor mesa stripes; and of subjecting said semiconductor wafer plane to mesa etching.
摘要翻译: 一种半导体晶体台面条的制造方法,其腰围比所述台面条的上平面窄。 该方法包括以下步骤:在半导体晶体晶片上形成第一条纹掩模,以便制造规定的台面条状物,将多个第二条纹掩模线性排列,比所述第一条纹掩模窄的主台面条带的规定的腰围宽度 以规定的间隔并且与所述第一条纹掩模平行地在半导体晶片平面上,以制造监视器台面条纹; 并对所述半导体晶片平面进行台面蚀刻。
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9.
公开(公告)号:US08879923B2
公开(公告)日:2014-11-04
申请号:US13603780
申请日:2012-09-05
申请人: Hiroshi Uemura , Hideto Furuyama
发明人: Hiroshi Uemura , Hideto Furuyama
IPC分类号: H04B10/00
CPC分类号: H04B10/69 , H04B10/504 , H04B10/508
摘要: According to one embodiment, an optical transmitter/receiver circuit device includes a transmitter circuit including a transition time adjusting circuit to obtain a second voltage signal from a first voltage signal and a voltage-current converter circuit that converts the second voltage signal to a first current signal, a light-emitting element to convert the first current signal to an optical signal, a light-receiving element to convert the optical signal to a second current signal, and a receiver circuit including a current-voltage converter circuit that converts the second current signal to a third voltage signal, a pulse generation circuit to generate rise and fall pulse from the third voltage signal and a decoder circuit that generates a fourth voltage signal in synchronism with the pulse.
摘要翻译: 根据一个实施例,光发射机/接收机电路装置包括发射机电路,该发射机电路包括过渡时间调整电路,以从第一电压信号获得第二电压信号;以及电压 - 电流转换器电路,其将第二电压信号转换为第一电流 信号,用于将第一电流信号转换为光信号的发光元件,将光信号转换为第二电流信号的光接收元件,以及包括电流 - 电压转换器电路的接收器电路,其将第二电流 信号到第三电压信号,脉冲发生电路,用于从第三电压信号产生上升和下降脉冲;以及解码器电路,其产生与脉冲同步的第四电压信号。
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公开(公告)号:US08835830B2
公开(公告)日:2014-09-16
申请号:US13308646
申请日:2011-12-01
申请人: Hiroshi Uemura , Ippei Akita , Tetsuro Itakura , Hideto Furuyama
发明人: Hiroshi Uemura , Ippei Akita , Tetsuro Itakura , Hideto Furuyama
摘要: According to one embodiment, a circuit comprises a first resistor configured to have one end to which a first voltage is input and the other end which outputs a second voltage and a first amplifier configured to have an inverting input connected to the other end of the first resistor and a noninverting input to which a third voltage is input. The circuit further comprises a first capacitor configured to have one end to which an output of the first amplifier is input and the other end to which the other end of the first resistor is connected. An output of the first amplifier or an output of a second amplifier connected to the other end of the first resistor is a fourth voltage. In the circuit, the first resistor and a mirror capacitance composed of the first capacitor and the first amplifier constitute a low-pass filter.
摘要翻译: 根据一个实施例,电路包括第一电阻器,其被配置为具有输入第一电压的一端和输出第二电压的另一端和配置成具有连接到第一电压的另一端的反相输入的第一放大器 电阻器和输入第三电压的同相输入端。 电路还包括第一电容器,其被配置为具有输入第一放大器的输出的一端和第一电阻器的另一端连接到的另一端。 连接到第一电阻器的另一端的第一放大器的输出或第二放大器的输出是第四电压。 在该电路中,由第一电容器和第一放大器组成的第一电阻器和反射镜电容器构成低通滤波器。
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