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    SEMICONDUCTOR DEVICE
    5.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20220293785A1

    公开(公告)日：2022-09-15

    申请号：US17395890

    申请日：2021-08-06

    Applicant: KABUSHIKI KAISHA TOSHIBA ,  TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION

    Inventor： Yusuke KOBAYASHI ,  Tomoaki INOKUCHI ,  Hiro GANGI ,  Hiroki NEMOTO ,  Akihiro GORYU ,  Ryohei GEJO ,  Tsuyoshi KACHI ,  Tatsuya NISHIWAKI

    IPC: H01L29/78 ,  H01L29/423 ,  H01L29/06 ,  H01L29/40 ,  H01L29/165

    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, a conductive member, a semiconductor member, and an insulating member. The conductive member includes a conductive member end portion and a conductive member other-end portion. The conductive member end portion is between the first electrode and the conductive member other-end portion. The conductive member is electrically connected with one of the second electrode or the third electrode. The semiconductor member includes first to third semiconductor regions. The first semiconductor region includes first and second partial regions. The first partial region is between the first and second electrodes. The second semiconductor region is between the first partial region and the third semiconductor region. The third semiconductor region is electrically connected with the second electrode. A portion of the insulating member is between the semiconductor member and the third electrode and between the semiconductor member and the conductive member.

    SEMICONDUCTOR DEVICE
    6.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20220190154A1

    公开(公告)日：2022-06-16

    申请号：US17395070

    申请日：2021-08-05

    Applicant: KABUSHIKI KAISHA TOSHIBA ,  TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION

    Inventor： Yusuke KOBAYASHI ,  Akihiro GORYU ,  Ryohei GEJO ,  Hiro GANGI ,  Tomoaki INOKUCHI ,  Shotaro BABA ,  Tatsuya NISHIWAKI ,  Tsuyoshi KACHI

    IPC: H01L29/78 ,  H01L29/40

    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, a first conductive member, a semiconductor member, and a first insulating member. The third electrode includes a third electrode end portion and a third electrode other-end portion. The first conductive member includes a first conductive member end portion and a first conductive member other-end portion. The first conductive member is electrically connected with one of the second electrode or the third electrode. The semiconductor member includes first to fourth semiconductor regions. The first semiconductor region includes first and second partial regions. The third semiconductor region is electrically connected with the second electrode. The fourth semiconductor region is electrically connected with the first electrode. At least a portion of the first insulating member is between the semiconductor member and the third electrode and between the semiconductor member and the first conductive member.

    INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD AND NON-TRANSITORY COMPUTER READABLE MEDIUM
    8.
    发明公开
    INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD AND NON-TRANSITORY COMPUTER READABLE MEDIUM 审中-公开

    公开(公告)号：US20240054272A1

    公开(公告)日：2024-02-15

    申请号：US18174937

    申请日：2023-02-27

    Applicant: KABUSHIKI KAISHA TOSHIBA

    Inventor： Hiro GANGI ,  Yasunori TAGUCHI ,  Hideyuki NAKAGAWA ,  Tomoaki INOKUCHI ,  Yusuke KOBAYASHI ,  Akihiro GORYU

    IPC: G06F30/367

    CPC classification number: G06F30/367 ,  G06F2111/10

    Abstract: An information processing apparatus according to one embodiment, comprising: a regression model generator configured to, by combining two or more of a plurality of variables, generate a plurality of terms that include combinations of two or more of the plurality of variables, respectively, and generate a regression model that regresses a property variable or an objective variable indicating an output of an objective function that includes the property variable, by the plurality of terms; a subgroup generator configured to generate, based on coefficients of the plurality of terms included in the regression model, subgroups that are the combinations of variables included the terms, respectively; and a subspace search processor configured to perform search for each of subspaces spanned by the subgroups based on an optimization criterion for the objective function, and generate pieces of first design value data that include values of the plurality of variables for the subspaces.

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    9.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开

    公开(公告)号：US20190221646A1

    公开(公告)日：2019-07-18

    申请号：US16118065

    申请日：2018-08-30

    Applicant: KABUSHIKI KAISHA TOSHIBA

    Inventor： Akihiro GORYU ,  Mitsuaki Kato ,  Kenji Hirohata

    IPC: H01L29/16 ,  H01L29/417 ,  H01L29/78 ,  H01L29/423 ,  H01L29/66

    CPC classification number: H01L29/1608 ,  H01L29/41741 ,  H01L29/42356 ,  H01L29/66068 ,  H01L29/7827

    Abstract: A semiconductor device comprises a semiconductor chip and a mounting substrate. The semiconductor chip has an element structure including: a silicon carbide substrate that has a hexagonal crystal structure; a gate electrode that is disposed on a part above a first surface corresponding to a (0001) plane or a (000-1) plane of the silicon carbide substrate; an insulating film that is interposed between the silicon carbide substrate and the gate electrode; and a source and a drain that are disposed with respect to the silicon carbide substrate and the gate electrode such that at least a part of a channel through which a carrier moves extends in a direction of crystal orientation of the silicon carbide substrate. The mounting substrate is fixed with the semiconductor chip such that compressive stress in a direction of crystal orientation of the silicon carbide substrate is applied to the semiconductor chip at least in operation.

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