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公开(公告)号:US20220302169A1
公开(公告)日:2022-09-22
申请号:US17411733
申请日:2021-08-25
Applicant: KIOXIA CORPORATION
Inventor: Keisuke TAKAGI , Kazuhiro MATSUO , Kunifumi SUZUKI , Yuuichi KAMIMUTA , Taro SHIOKAWA , Masumi SAITOH , Yuta KAMIYA , Kota TAKAHASHI
IPC: H01L27/11597 , G11C16/04 , H01L27/1157 , H01L27/11582
Abstract: A semiconductor storage device includes a channel layer extending along a first direction and including titanium oxide, an electrode layer extending along a second direction crossing the first direction, and a ferroelectric layer between the channel layer and the electrode layer and including titanium.
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公开(公告)号:US20240096389A1
公开(公告)日:2024-03-21
申请号:US18459962
申请日:2023-09-01
Applicant: Kioxia Corporation
Inventor: Kunifumi SUZUKI , Yuuichi KAMIMUTA
IPC: G11C11/22 , G11C16/04 , H01L21/28 , H01L29/51 , H01L29/66 , H01L29/78 , H10B51/10 , H10B51/20 , H10B51/30
CPC classification number: G11C11/2273 , G11C11/2275 , G11C16/0483 , H01L29/40111 , H01L29/516 , H01L29/6684 , H01L29/78391 , H10B51/10 , H10B51/20 , H10B51/30
Abstract: A memory cell includes: a core structure extending in a first direction orthogonal to a semiconductor substrate; a semiconductor layer extending in the first direction and in contact with the core structure; an insulating layer extending in the first direction and in contact with the semiconductor layer; a ferroelectric layer extending in the first direction and in contact with the insulating layer; a first electrode extending in a second direction orthogonal to the first direction and in contact with the ferroelectric layer; a second electrode adjacent to the first electrode in the first direction, extending in the second direction, and in contact with the ferroelectric layer; an insulating layer stacked in the first direction and disposed between the first and second electrodes; and an antiferroelectric layer disposed between the first and second electrodes, and in contact with the insulating layer and the ferroelectric layer.
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公开(公告)号:US20240315041A1
公开(公告)日:2024-09-19
申请号:US18593981
申请日:2024-03-04
Applicant: Kioxia Corporation
Inventor: Kiwamu SAKUMA , Takamasa HAMAI , Yuuichi KAMIMUTA , Kunifumi SUZUKI
Abstract: A semiconductor memory device has a stacked body in which a plurality of electrode layers and a plurality of insulating layers are alternately stacked in a first direction, an electrode film that extends in the stacked body in the first direction, and a plurality of ferroelectric films. Each of the ferroelectric films is disposed between and in contact with one of the electrode layers and the electrode film, and has a thickness in the first direction that is greater than the electrode layer that is in contact therewith.
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公开(公告)号:US20240324238A1
公开(公告)日:2024-09-26
申请号:US18589342
申请日:2024-02-27
Applicant: Kioxia Corporation
Inventor: Reika TANAKA , Kunifumi SUZUKI , Kiwamu SAKUMA , Yoko YOSHIMURA , Takamasa HAMAI , Kensuke OTA , Yusuke HIGASHI , Yoshiaki ASAO , Masamichi SUZUKI
IPC: H10B53/30
CPC classification number: H10B53/30
Abstract: A storage device includes a first electrode, a second electrode, a first dielectric layer between the first and second electrodes and including oxygen and at least one of hafnium and zirconium, a second dielectric layer between the first electrode and the first dielectric layer, and an intermediate region between the first and second dielectric layers and in which a plurality of metallic portions are provided.
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公开(公告)号:US20230170018A1
公开(公告)日:2023-06-01
申请号:US17841287
申请日:2022-06-15
Applicant: Kioxia Corporation
Inventor: Kunifumi SUZUKI , Yuuichi KAMIMUTA
CPC classification number: G11C13/004 , G11C13/0069 , G11C13/0038 , G11C13/0004 , G11C5/06
Abstract: According to one embodiment, a memory device includes a memory cell including a resistance change memory portion and a switching portion, and a voltage applying circuit carrying out, at a time of writing data to the memory cell, an operation of applying a voltage of a first polarity to the memory cell and applying a first voltage to the memory cell, an operation of applying a voltage of a second polarity to the memory cell and applying a second voltage to the memory cell, an operation of applying a voltage of the first polarity to the memory cell and applying a third voltage to the memory cell, or an operation of applying a voltage of the second polarity to the memory cell and applying a fourth voltage to the memory cell.
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公开(公告)号:US20230084292A1
公开(公告)日:2023-03-16
申请号:US17654654
申请日:2022-03-14
Applicant: KIOXIA CORPORATION
Inventor: Kunifumi SUZUKI , Yuuichi KAMIMUTA
IPC: H01L27/11597 , H01L27/11556 , H01L27/11582 , G11C11/22
Abstract: A semiconductor memory device includes: a first semiconductor layer extending in a first direction; a first conductive layer and a second conductive layer that are arranged in the first direction and each opposed to the first semiconductor layer; a first insulating portion disposed between the first semiconductor layer and the first conductive layer, the first insulating portion containing oxygen (O) and hafnium (Hf); a second insulating portion disposed between the first semiconductor layer and the second conductive layer, the second insulating portion containing oxygen (O) and hafnium (Hf); and a first charge storage layer disposed between the first insulating portion and the second insulating portion, the first charge storage layer being spaced from the first conductive layer and the second conductive layer.
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公开(公告)号:US20220399489A1
公开(公告)日:2022-12-15
申请号:US17549236
申请日:2021-12-13
Applicant: Kioxia Corporation
Inventor: Kunifumi SUZUKI , Yuuichi KAMIMUTA
Abstract: A storage device 10 includes a phase change layer 40 containing tellurium, and a diffusion layer 50 containing at least one of germanium, silicon, carbon, tin, aluminum, gallium, and indium and disposed at a position adjacent to the phase change layer 40. The phase change layer 40 is capable of changing between a first state and a second state different from each other in electric resistance. The phase change layer 40 is in a crystal state in any of the first state and the second state. A length of the diffusion layer 50 in a direction orthogonal to a z direction is shorter than a length of the phase change layer 40 in the direction orthogonal to the z direction.
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公开(公告)号:US20250017020A1
公开(公告)日:2025-01-09
申请号:US18762786
申请日:2024-07-03
Applicant: Kioxia Corporation
Inventor: Yoko YOSHIMURA , Kiwamu Sakuma , Kunifumi SUZUKI , Hidesato ISHIDA
IPC: H10B51/20 , H01L21/28 , H01L23/528 , H01L23/532 , H01L29/51
Abstract: A semiconductor memory device includes a semiconductor layer; a gate electrode; a first insulating film provided between the semiconductor layer and the gate electrode, and including at least one of oxygen, hafnium, or a first additive element; and a second insulating film provided between the first insulating film and the gate electrode. The first insulating film includes a first additive region, a second additive region provided between the first additive region and the gate electrode, and a memory region provided between the first additive region and the second additive region. The first additive region includes a second additive element selected from a group consisting of ruthenium, titanium, molybdenum, tantalum, tungsten, platinum, and combinations thereof. The second additive region includes a third additive element selected group consisting of ruthenium, titanium, molybdenum, tantalum, tungsten, platinum, and combinations thereof.
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公开(公告)号:US20220399488A1
公开(公告)日:2022-12-15
申请号:US17587267
申请日:2022-01-28
Applicant: KIOXIA CORPORATION
Inventor: Kunifumi SUZUKI , Yuuichi KAMIMUTA
Abstract: A memory device includes a first interconnect layer, a second interconnect layer, a phase-change layer, and an adjacent layer. The phase-change layer is disposed between the first interconnect layer and the second interconnect layer and configured to reversibly transition between a crystalline state and an amorphous state. The adjacent layer contacts the phase-change layer and comprises tellurium and at least one of titanium, zirconium, or hafnium.
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公开(公告)号:US20220302170A1
公开(公告)日:2022-09-22
申请号:US17447352
申请日:2021-09-10
Applicant: Kioxia Corporation
Inventor: Kunifumi SUZUKI , Yuuichi KAMIMUTA
IPC: H01L27/11597 , H01L29/51
Abstract: A semiconductor memory device of an embodiment includes: a semiconductor layer extending in a first direction; a first gate electrode layer; a second gate electrode layer provided apart from the first gate electrode layer in the first direction; and a gate insulating layer containing oxygen and at least one metal element of hafnium or zirconium, the gate insulating layer including a first region between the first gate electrode layer and the semiconductor layer, a second region between the first gate electrode layer and the second gate electrode layer, and a third region between the second gate electrode layer and the semiconductor layer, the first region including a crystal of an orthorhombic crystal system or a trigonal crystal system as a main constituent substance, and a distance between the second region and the semiconductor layer being larger than a distance between the first region and the semiconductor layer.
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