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    DATA LATCH CIRCUIT, SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR STORAGE DEVICE
    1.
    发明公开
    DATA LATCH CIRCUIT, SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR STORAGE DEVICE 审中-公开

    公开(公告)号：US20240305279A1

    公开(公告)日：2024-09-12

    申请号：US18460030

    申请日：2023-09-01

    Applicant: Kioxia Corporation

    Inventor： Toshifumi WATANABE ,  Kiyofumi SAKURAI ,  Teppei HIGASHITSUJI ,  Takumi KOSAKI ,  Eiji KOZUKA

    IPC: H03K3/356 ,  G11C16/04 ,  G11C16/26 ,  G11C16/30

    CPC classification number: H03K3/356017 ,  G11C16/0483 ,  G11C16/26 ,  G11C16/30

    Abstract: A data latch circuit according to embodiments described herein includes a first circuit and a second circuit. The first circuit has a first transistor with a first conductivity type and a second transistor with a second conductivity type that differs from the first conductivity type being connected in series and stores a first logical value. The second circuit has a third transistor with the first conductivity type and a fourth transistor with the second conductivity type being connected in series and stores a second logical value being an inversion of the first logical value. The data latch circuit enables one of a first voltage and a second voltage that differs from the first voltage to be applied to back gates of the first transistor and the third transistor and enables a third voltage to be applied to sources of the first transistor and the third transistor.

    SEMICONDUCTOR STORAGE DEVICE
    2.
    发明申请
    SEMICONDUCTOR STORAGE DEVICE 有权

    公开(公告)号：US20250087274A1

    公开(公告)日：2025-03-13

    申请号：US18960230

    申请日：2024-11-26

    Applicant: Kioxia Corporation

    Inventor： Hiroyuki TAKENAKA ,  Akihiko CHIBA ,  Teppei HIGASHITSUJI ,  Kiyofumi SAKURAI ,  Hiroaki NAKASA ,  Youichi MAGOME

    IPC: G11C16/14 ,  G11C5/06 ,  G11C16/04 ,  G11C16/16 ,  G11C16/24 ,  G11C16/26 ,  G11C16/30

    Abstract: A semiconductor storage device includes a first semiconductor substrate, a second semiconductor substrate, a first memory cell and a second memory cell provided between the first semiconductor substrate and the second semiconductor substrate, a first word line electrically connected to the first memory cell, a second word line electrically connected to the second memory cell, a first transistor that is provided on the first semiconductor substrate and electrically connected between the first word line and a first wiring through which a voltage is applied to the first word line, and a second transistor that is provided on the semiconductor substrate and electrically connected between the second word line and a second wiring through which a voltage is applied to the second word line.

    SEMICONDUCTOR MEMORY
    4.
    发明公开
    SEMICONDUCTOR MEMORY 审中-公开

    公开(公告)号：US20240055057A1

    公开(公告)日：2024-02-15

    申请号：US18177026

    申请日：2023-03-01

    Applicant: Kioxia Corporation

    Inventor： Teppei HIGASHITSUJI ,  Toshifumi WATANABE

    IPC: G11C16/26 ,  G11C5/06

    CPC classification number: G11C16/26 ,  G11C5/06

    Abstract: A semiconductor memory includes a memory cell, a bit line electrically connected to the memory cell, a sense amplifier including a first latch circuit, a first hookup circuit, a second latch circuit, a first wiring, and a first pre-charge circuit. The sense amplifier is in a first circuit area. The first hookup circuit is in a second circuit area and configured to control connection between the bit line and the sense amplifier. The first wiring is connected between the first latch circuit and the second latch circuit. The first pre-charge circuit includes a first transistor in a third circuit area between the first circuit area and the second circuit area. The first transistor has a first end connected to the first wiring at a first position in the third circuit area and a second end connectable to a terminal supplied with one of a pre-charge voltage and a ground voltage.

    SEMICONDUCTOR STORAGE DEVICE
    5.
    发明申请
    SEMICONDUCTOR STORAGE DEVICE 有权

    公开(公告)号：US20220246196A1

    公开(公告)日：2022-08-04

    申请号：US17458067

    申请日：2021-08-26

    Applicant: KIOXIA CORPORATION

    Inventor： Hiroyuki TAKENAKA ,  Akihiko CHIBA ,  Teppei HIGASHITSUJI ,  Kiyofumi SAKURAI ,  Hiroaki NAKASA ,  Youichi MAGOME

    IPC: G11C11/408 ,  G11C11/4094 ,  G11C11/4074 ,  G11C11/4091 ,  G11C5/06

    Abstract: A semiconductor storage device includes a first semiconductor substrate, a second semiconductor substrate, a first memory cell and a second memory cell provided between the first semiconductor substrate and the second semiconductor substrate, a first word line electrically connected to the first memory cell, a second word line electrically connected to the second memory cell, a first transistor that is provided on the first semiconductor substrate and electrically connected between the first word line and a first wiring through which a voltage is applied to the first word line, and a second transistor that is provided on the semiconductor substrate and electrically connected between the second word line and a second wiring through which a voltage is applied to the second word line.

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