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    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
    1.
    发明申请
    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME 审中-公开
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US20130221423A1

    公开(公告)日：2013-08-29

    申请号：US13599420

    申请日：2012-08-30

    申请人： Kaori Kawasaki ,  Yoshiaki Fukuzumi ,  Naoki Yasuda ,  Hideaki Aochi

    发明人： Kaori Kawasaki ,  Yoshiaki Fukuzumi ,  Naoki Yasuda ,  Hideaki Aochi

    IPC分类号： H01L29/788 ,  H01L21/20

    CPC分类号： H01L27/11556

    摘要： According to one embodiment, a nonvolatile semiconductor memory device includes an underlayer and a stacked body. The stacked body includes control gate layers and insulating layers. The device includes a channel body layer penetrating through the stacked body, and the control gate layers and the insulating layers are stacked in the stacking direction, a floating gate layer provided between each of the plurality of control gate layers and the channel body layer. The device includes a block insulating layer provided between each of the plurality of control gate layers and the floating gate layer, and includes a tunnel insulating layer provided between the channel body layer and the floating gate layer. A length of a boundary between the floating gate layer and the block insulating layer is shorter than a length of a boundary between the floating gate layer and the tunnel insulating layer.

    摘要翻译： 根据一个实施例，非易失性半导体存储器件包括底层和堆叠体。 堆叠体包括控制栅极层和绝缘层。 该器件包括穿透层叠体的沟道本体层，并且控制栅极层和绝缘层在堆叠方向上堆叠，设置在多个控制栅极层中的每一个与沟道主体层之间的浮动栅层。 该器件包括设置在多个控制栅极层和浮置栅极层中的每一个之间的块绝缘层，并且包括设置在沟道本体层和浮动栅极层之间的隧道绝缘层。 浮置栅极层与块状绝缘层之间的边界长度比浮动栅极层与隧道绝缘层的边界长度短。

    Nonvolatile semiconductor memory device and method of manufacturing the same
    2.
    发明授权
    Nonvolatile semiconductor memory device and method of manufacturing the same 有权
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US08598643B2

    公开(公告)日：2013-12-03

    申请号：US13235425

    申请日：2011-09-18

    申请人： Kaori Kawasaki ,  Yoshiaki Fukuzumi ,  Masaru Kito ,  Tomoko Fujiwara ,  Takeshi Imamura ,  Ryouhei Kirisawa ,  Hideaki Aochi

    发明人： Kaori Kawasaki ,  Yoshiaki Fukuzumi ,  Masaru Kito ,  Tomoko Fujiwara ,  Takeshi Imamura ,  Ryouhei Kirisawa ,  Hideaki Aochi

    IPC分类号： H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

    CPC分类号： H01L27/11582 ,  H01L27/1157 ,  H01L29/7926

    摘要： According to one embodiment, a nonvolatile semiconductor memory device comprises a first conductive layer, a second conductive layer, a first inter-electrode insulating film, and a third conductive layer stacked above the first conductive layer, a memory film, a semiconductor layer, an insulating member, and a silicide layer. The memory film and the semiconductor layer is formed on the inner surface of through hole provided in the second conductive layer, the first inter-electrode insulating film, and the third conductive layer. The insulating member is buried in a slit dividing the second conductive layer, the first inter-electrode insulating film, and the third conductive layer. The silicide layer is formed on surfaces of the second conductive layer and the third conductive layer in the slit. The distance between the second conductive layer and the third conductive layer along the inner surface of the slit is longer than that of along the stacking direction.

    摘要翻译： 根据一个实施例，非易失性半导体存储器件包括第一导电层，第二导电层，第一电极间绝缘膜和堆叠在第一导电层上方的第三导电层，存储膜，半导体层， 绝缘构件和硅化物层。 存储膜和半导体层形成在设置在第二导电层，第一电极间绝缘膜和第三导电层中的通孔的内表面上。 绝缘构件埋设在分割第二导电层，第一电极间绝缘膜和第三导电层的狭缝中。 硅化物层形成在狭缝中的第二导电层和第三导电层的表面上。 沿着狭缝的内表面，第二导电层和第三导电层之间的距离比层叠方向长。

    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
    3.
    发明申请
    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US20120241846A1

    公开(公告)日：2012-09-27

    申请号：US13235425

    申请日：2011-09-18

    申请人： Kaori KAWASAKI ,  Yoshiaki Fukuzumi ,  Masaru Kito ,  Tomoko Fujiwara ,  Takeshi Imamura ,  Ryouhei Kirisawa ,  Hideaki Aochi

    发明人： Kaori KAWASAKI ,  Yoshiaki Fukuzumi ,  Masaru Kito ,  Tomoko Fujiwara ,  Takeshi Imamura ,  Ryouhei Kirisawa ,  Hideaki Aochi

    IPC分类号： H01L29/792 ,  H01L21/28

    CPC分类号： H01L27/11582 ,  H01L27/1157 ,  H01L29/7926

    摘要： According to one embodiment, a nonvolatile semiconductor memory device comprises a first conductive layer, a second conductive layer, a first inter-electrode insulating film, and a third conductive layer stacked above the first conductive layer, a memory film, a semiconductor layer, an insulating member, and a silicide layer. The memory film and the semiconductor layer is formed on the inner surface of through hole provided in the second conductive layer, the first inter-electrode insulating film, and the third conductive layer. The insulating member is buried in a slit dividing the second conductive layer, the first inter-electrode insulating film, and the third conductive layer. The silicide layer is formed on surfaces of the second conductive layer and the third conductive layer in the slit. The distance between the second conductive layer and the third conductive layer along the inner surface of the slit is longer than that of along the stacking direction.

    摘要翻译： 根据一个实施例，非易失性半导体存储器件包括第一导电层，第二导电层，第一电极间绝缘膜和堆叠在第一导电层上方的第三导电层，存储膜，半导体层， 绝缘构件和硅化物层。 存储膜和半导体层形成在设置在第二导电层，第一电极间绝缘膜和第三导电层中的通孔的内表面上。 绝缘构件埋设在分割第二导电层，第一电极间绝缘膜和第三导电层的狭缝中。 硅化物层形成在狭缝中的第二导电层和第三导电层的表面上。 沿着狭缝的内表面，第二导电层和第三导电层之间的距离比层叠方向长。

    Shift register memory and method of manufacturing the same
    5.
    发明授权
    Shift register memory and method of manufacturing the same 有权
    移位寄存器及其制造方法

    公开(公告)号：US09064975B2

    公开(公告)日：2015-06-23

    申请号：US13409652

    申请日：2012-03-01

    申请人： Yoshiaki Fukuzumi ,  Masaru Kito ,  Tomoko Fujiwara ,  Kaori Kawasaki ,  Hideaki Aochi

    发明人： Yoshiaki Fukuzumi ,  Masaru Kito ,  Tomoko Fujiwara ,  Kaori Kawasaki ,  Hideaki Aochi

    IPC分类号： H01L29/765 ,  H01L21/84 ,  H01L27/10 ,  H01L27/115 ,  H01L27/12 ,  G11C19/00

    CPC分类号： H01L21/84 ,  G11C19/00 ,  H01L27/10 ,  H01L27/11517 ,  H01L27/1203

    摘要： In one embodiment, a shift register memory includes first and second control electrodes extending in a first direction parallel to a surface of a substrate, and facing each other in a second direction perpendicular to the first direction. The memory further includes a plurality of first floating electrodes provided in a line on a first control electrode side between the first and second control electrodes. The memory further includes a plurality of second floating electrodes provided in a line on a second control electrode side between the first and second control electrodes. Each of the first and second floating electrodes has a planar shape which is mirror-asymmetric with respect to a plane perpendicular to the first direction.

    摘要翻译： 在一个实施例中，移位寄存器存储器包括在平行于衬底表面的第一方向上延伸的第一和第二控制电极，并且在垂直于第一方向的第二方向上彼此面对。 存储器还包括设置在第一和第二控制电极之间的第一控制电极侧的一行中的多个第一浮置电极。 存储器还包括设置在第一和第二控制电极之间的第二控制电极侧的一行中的多个第二浮置电极。 第一和第二浮动电极中的每一个具有相对于垂直于第一方向的平面镜像不对称的平面形状。

    Nonvolatile semiconductor memory device
    9.
    发明授权
    Nonvolatile semiconductor memory device 有权
    非易失性半导体存储器件

    公开(公告)号：US08653577B2

    公开(公告)日：2014-02-18

    申请号：US13003644

    申请日：2009-07-01

    申请人： Yoshiaki Fukuzumi ,  Hiroyasu Tanaka ,  Yosuke Komori ,  Megumi Ishiduki ,  Masaru Kito ,  Hideaki Aochi ,  Ryota Katsumata ,  Masaru Kidoh

    发明人： Yoshiaki Fukuzumi ,  Hiroyasu Tanaka ,  Yosuke Komori ,  Megumi Ishiduki ,  Masaru Kito ,  Hideaki Aochi ,  Ryota Katsumata ,  Masaru Kidoh

    IPC分类号： H01L29/788 ,  H01L29/792

    CPC分类号： H01L29/7926 ,  G11C16/0466 ,  H01L27/11565 ,  H01L27/11578 ,  H01L27/11582

    摘要： A nonvolatile semiconductor memory device includes: a stacked body in which insulating films and electrode films are alternately stacked; selection gate electrodes provided on the stacked body; bit lines provided on the selection gate electrodes; semiconductor pillars; connective members separated from one another; and a charge storage layer provided between the electrode film and the semiconductor pillar. One of the connective members is connected between a lower part of one of the semiconductor pillars and a lower part of another of the semiconductor pillars. The one of the semiconductor pillars passes through one of the selection gate electrodes and is connected to one of the bit lines, and the another of the semiconductor pillars passes through another of the selection gate electrodes and is connected to another of the bit lines.

    摘要翻译： 非易失性半导体存储器件包括：绝缘膜和电极膜交替层叠的层叠体; 设置在层叠体上的选择栅电极; 设置在选择栅电极上的位线; 半导体柱 连接成员彼此分离; 以及设置在电极膜和半导体柱之间的电荷存储层。 一个连接构件连接在一个半导体柱的下部和另一个半导体柱的下部之间。 半导体柱中的一个穿过选择栅极之一并连接到一个位线，并且另一个半导体柱通过另一个选择栅电极并连接到另一个位线。

    Semiconductor memory device
    10.
    发明授权
    Semiconductor memory device 有权
    半导体存储器件

    公开(公告)号：US08581305B2

    公开(公告)日：2013-11-12

    申请号：US13046894

    申请日：2011-03-14

    申请人： Yoshiaki Fukuzumi ,  Hideaki Aochi

    发明人： Yoshiaki Fukuzumi ,  Hideaki Aochi

    IPC分类号： H01L23/525

    CPC分类号： H01L27/2463 ,  G11C13/0007 ,  G11C16/04 ,  G11C2213/73 ,  H01L23/525 ,  H01L23/528 ,  H01L27/2436 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor memory device according to one embodiment of the present invention includes a dielectric film configured to store information depending on presence or absence of a conductive path therein, and a plurality of electrodes provided to contact a first surface of the dielectric film. The conductive path can be formed between two electrodes arbitrarily selected form the plurality of electrodes. The conductive path has a rectifying property of allowing a current to flow more easily in a first direction connecting arbitrary two electrodes than in a second direction opposite to the first direction. The largest possible number of the conductive paths that may be formed is larger than the number of the plurality of electrodes.

    摘要翻译： 根据本发明的一个实施例的半导体存储器件包括：电介质膜，被配置为根据存在或不存在导电路径来存储信息;以及多个电极，设置成与电介质膜的第一表面接触。 导电路径可以形成在从多个电极任意选择的两个电极之间。 导电路径具有使电流在连接任意两个电极的第一方向上比在与第一方向相反的第二方向更容易流动的整流特性。 可能形成的最大可能数量的导电路径大于多个电极的数量。