Method and apparatus for liquid chromatography under elevated pressure
    2.
    发明授权

    公开(公告)号:US4073725A

    公开(公告)日:1978-02-14

    申请号:US679750

    申请日:1976-04-23

    IPC分类号: B01D15/08 G01N30/96

    摘要: A sample containing a plurality of components to be analyzed is introduced to a separation column at its top through a sample feeding device. The sample thus introduced is separated to the individual components in the separation column. Ion exchange resins capable of undergoing deformation depending upon an applied pressure are filled in the separation column. An eluting solution containing sodium ions is fed to the separation column at its top under a pressure of 40 kg/cm.sup.2 or higher through a feed pump. Components leaving the separation column at its bottom are detected by a detector. After the components have left the separation column, a regenerating solution containing lithium ions is introduced to the separation column at its bottom, and is made to leave the separation column at its top. The ion exchange resins are regenerated by passing the regenerating solution through the separation column, and a separation for another sample is made ready thereby. Another sample is then introduced into the separation column at its bottom and the separated components of the sample are made to leave the separation column at its top.

    摘要翻译: 将待分析的多种成分的样品在其顶部通过样品供给装置引入分离塔。 将如此引入的样品分离成分离塔中的各个组分。 能够根据施加的压力进行变形的离子交换树脂填充在分离塔中。 含有钠离子的洗脱溶液通过进料泵以40kg / cm 2或更高的压力在其顶部进料至分离塔。 通过检测器检测离开分离柱在其底部的组分。 在组分离开分离柱后,将含有锂离子的再生溶液在其底部引入分离塔,并使分离塔离开顶部。 离子交换树脂通过使再生溶液通过分离塔而再生,并且由此准备另一个样品的分离。 然后将另一个样品在其底部引入分离塔,并将样品的分离组分留在顶部的分离塔。

    Method of ion exchange chromatography
    4.
    发明授权
    Method of ion exchange chromatography 失效
    离子交换色谱法

    公开(公告)号:US4133753A

    公开(公告)日:1979-01-09

    申请号:US845721

    申请日:1977-10-26

    CPC分类号: G01N33/6806

    摘要: The separation of constituents is carried out in such a way that a mixed amino acid sample is supplied to a separation column packed with a cation exchange resin and that, during the analysis of the single sample, five sorts of elutes of different compositions are supplied to the separation column in succession and by stages. The pH of the elute at the second stage is held higher than that of the elute at the first stage, and the pH's of the elutes at the third to fifth stages are held successively higher. However, the pH of the elute at the third stage is held lower than that of the elute at the second stage. On the other hand, the concentrations of counter ions contained in the elutes at the first to fifth stages are held successively higher inversely to the order in which the elutes are supplied. Notwithstanding that the pH of the elute at the third stage is lowered, the broadening of a component peak can be prevented by the increase of the counter ion concentration. Moreover, the analytical time is shortened as a whole.

    摘要翻译: 成分的分离是以将混合氨基酸样品供给到填充有阳离子交换树脂的分离塔的方式进行的,并且在分析单个样品期间,将五种不同组成的洗脱液供应至 分离柱依次分阶段进行。 第二阶段洗脱液的pH值保持在第一阶段的洗脱液pH值,第三至第五阶段洗脱液的pH值依次保持较高。 然而,第三阶段洗脱液的pH值比第二阶段洗脱液的pH低。 另一方面,包含在第一至第五阶段的洗脱液中的抗衡离子的浓度相对于提供洗脱液的顺序相反地保持更高。 尽管第三阶段的洗脱液的pH降低,但通过增加反离子浓度可以防止成分峰的变宽。 此外,整体上缩短了分析时间。

    Semiconductor device including interconnects formed by damascene process and manufacturing method thereof
    6.
    发明授权
    Semiconductor device including interconnects formed by damascene process and manufacturing method thereof 有权
    包括通过镶嵌工艺形成的互连的半导体器件及其制造方法

    公开(公告)号:US07361992B2

    公开(公告)日:2008-04-22

    申请号:US10664875

    申请日:2003-09-22

    IPC分类号: H01L29/40

    摘要: After etching the interlayer dielectric film 4 formed on the lower layer interconnect line 1 into a shape with holes, the upper layer dielectric film 6 is etched into a shape with trenches utilizing the etching stopper 5. The etching stopper 5 which is exposed at the bottom of the trench is removed by additional etching, and then, the interlayer dielectric film 4 which is exposed at the bottom of the trench is etched back to a predetermined thickness. Subsequently, the hole and the trench are filled with an interconnect metal 10.

    摘要翻译: 在将下层布线1上形成的层间绝缘膜4蚀刻成具有孔的形状之后,将上层电介质膜6用蚀刻阻挡层5蚀刻成具有沟槽的形状。 通过附加蚀刻去除在沟槽底部暴露的蚀刻阻挡层5,然后将在沟槽底部暴露的层间绝缘膜4回蚀刻到预定厚度。 随后,孔和沟槽填充互连金属10。

    Method of fabricating semiconductor device having element isolation trench

    公开(公告)号:US06559031B2

    公开(公告)日:2003-05-06

    申请号:US09960494

    申请日:2001-09-24

    申请人: Kazunori Fujita

    发明人: Kazunori Fujita

    IPC分类号: H01L2176

    CPC分类号: H01L21/76235

    摘要: A method of fabricating a semiconductor device capable of sufficiently rounding an opening upper end of an element isolation trench is obtained. This method of fabricating a semiconductor device comprises steps of forming an element isolation trench on a semiconductor substrate, performing thermal oxidation on at least an opening upper end of the element isolation trench while increasing the atmosphere temperature of the semiconductor substrate beyond a prescribed temperature thereby forming a first oxide film and suppressing formation of the first oxide film on the opening upper end before the atmosphere temperature is increased beyond the prescribed temperature. Thus, the semiconductor substrate is prevented from oxidation under a low temperature, whereby oxidation is more thickly performed by thermal oxidation in a high-temperature region while relaxing stress applied to the semiconductor substrate. Therefore, oxidation is thickly performed in the high-temperature region not reducing the oxidizing velocity for a corner portion, whereby the opening upper end of the element isolation trench can be sufficiently rounded.

    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
    9.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号:US20080185638A1

    公开(公告)日:2008-08-07

    申请号:US11965536

    申请日:2007-12-27

    IPC分类号: H01L29/78 H01L21/336

    摘要: A semiconductor device capable of inhibiting a fabricating process from complication while inhibiting the dielectric strength voltage of a insulating film from reduction is obtained. This semiconductor device includes a groove portion, an insulating film formed on a surface of the groove portion, a gate electrode and a source impurity region, wherein upper ends of the gate electrode, which are portions in contact with the insulating film, are each located at a position identical with or deeper than the range of an impurity introduced from a surface of a semiconductor substrate with respect to the insulating film in order to form the source impurity region and above a lower surface of the source impurity region.

    摘要翻译: 可以获得能够在抑制绝缘膜的介电强度电压降低的同时抑制制造工艺的复杂化的半导体器件。 该半导体器件包括沟槽部分,形成在沟槽部分的表面上的绝缘膜,栅极电极和源极杂质区域,其中栅电极的与绝缘膜接触的部分的上端分别位于 在与半导体衬底的表面相对于绝缘膜引入的杂质的范围相同或更深的位置处,以形成源极杂质区域和源极杂质区域的下表面之上。