利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

77 条记录 (耗时 0.06 秒)

    Methods of fabrication of coaxial vias and magnetic devices
    1.
    发明授权
    Methods of fabrication of coaxial vias and magnetic devices 失效
    同轴通孔和磁性器件的制造方法

    公开(公告)号：US5898991A

    公开(公告)日：1999-05-04

    申请号：US783738

    申请日：1997-01-16

    申请人： Keith Edward Fogel ,  Jeffrey Curtis Hedrick ,  David Andrew Lewis ,  Eva E. Simonyi ,  Alfred Viehbeck ,  Stanley Joseph Whitehair

    发明人： Keith Edward Fogel ,  Jeffrey Curtis Hedrick ,  David Andrew Lewis ,  Eva E. Simonyi ,  Alfred Viehbeck ,  Stanley Joseph Whitehair

    IPC分类号： H01F27/28 ,  H01F41/04 ,  H05K3/40 ,  H05K3/44 ,  H01F7/06

    CPC分类号： H01F41/046 ,  H01F27/2804 ,  H05K3/445 ,  H05K2201/09881 ,  H05K3/4046 ,  Y10T29/4902

    摘要： Methods are described for fabricating devices having vias containing more than one electrical conductor, in particular coaxial electrical conductors. A plurality of wires are bonded to a first substrate, such as a copper wire to a copper substrate. A second substrate having through-holes with side walls covered with an electrical conductor is disposed over the first substrate so that the wires are within the through-holes and spaced apart from the side walls. The first substrate is spaced apart from the second substrate by dielectric spacers. A polymer is injected into the space between the first and second substrates to provide electrical isolation therebetween. A polymer is injected into the space in the via between the elongated conductors and the conductive sidewall to provide dielectric isolation therebetween. The second substrate has electrically conductive pattern on both sides which are electrically interconnected by the electrically conductive sidewall to form an inner coil of electrical conductors. The first substrate is patterned to form an electrical conductive pattern. A pattern of electrical conductors is formed on the dielectric material on the side of the second substrate opposite the patterned first substrate and is electrically connected therewith through the elongated conductors on the through-hole to form an outer coil of electrical conductors around the inner coil of electrical conductors to from a transformer or an inductor.

    摘要翻译： 描述了用于制造具有包含多于一个电导体，特别是同轴电导体的通孔的器件的方法。 多根导线被接合到诸如铜线的第一基底到铜基底上。 具有覆盖有电导体的侧壁的通孔的第二基板设置在第一基板上，使得电线在通孔内并与侧壁间隔开。 第一衬底通过介电间隔物与第二衬底间隔开。 将聚合物注入到第一和第二基板之间的空间中以在它们之间提供电隔离。 将聚合物注入到细长导体和导电侧壁之间的通孔中的空间中，以在它们之间提供电介质隔离。 第二衬底在两侧上具有导电图案，其通过导电侧壁电互连以形成电导体的内部线圈。 图案化第一衬底以形成导电图案。 在第二基板的与图案化的第一基板相对的一侧上的电介质材料上形成电导体的图案，并且通过通孔上的细长导体与其电连接，以形成围绕内部线圈的电导体的外部线圈 电导体来自变压器或电感器。

    HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
    6.
    发明申请
    HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF 审中-公开
    高密度集成电路设备，测试探针及其使用方法

    公开(公告)号：US20080129319A1

    公开(公告)日：2008-06-05

    申请号：US11930033

    申请日：2007-10-30

    申请人： Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih ,  George Frederick Walker

    发明人： Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih ,  George Frederick Walker

    IPC分类号： G01R31/02

    CPC分类号： G01R1/0735 ,  G01R1/06744 ,  G01R1/0675 ,  G01R1/07307 ,  G01R1/07378 ,  G01R3/00

    摘要： The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.

    摘要翻译： 本发明涉及一种高密度测试探针，其提供用于测试晶片形式的高密度和高性能集成电路或作为离散芯片的装置。 测试探针由嵌入柔性或高模量弹性体材料的细长电导体的密集阵列形成。 使用陶瓷集成电路芯片封装基板等标准封装基板来提供空间变压器。 电线被连接到空间变压器表面上的接触焊盘阵列。 空间变压器由多层集成电路芯片封装基板形成。 电线与接触位置阵列一样密集。 围绕着向外突出的线的阵列设置模具。 液体弹性体设置在模具中以填充电线之间的空间。 弹性体被固化并且模具被去除，留下布置在弹性体中并且与空间变压器电接触的线阵列。空间变压器可以具有一组引脚，这些引脚位于空间变压器的相反表面上， 其中细长导体被接合。 这些销插入第二空间变压器（例如印刷电路板）上的插座中以形成探针组件。 或者，插入器电连接器可以设置在第一和第二空间变压器之间。

    HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
    7.
    发明申请
    HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF 审中-公开

    公开(公告)号：US20080116915A1

    公开(公告)日：2008-05-22

    申请号：US11929821

    申请日：2007-10-30

    申请人： Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih ,  George Frederick Walker

    发明人： Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih ,  George Frederick Walker

    IPC分类号： G01R1/073

    CPC分类号： G01R1/0735 ,  G01R1/06744 ,  G01R1/0675 ,  G01R1/07307 ,  G01R1/07378 ,  G01R3/00

    摘要： The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.