摘要:
A variable divider in which a dividing number setting parameter can be set is provided in a reference oscillator. When a frequency setting parameter is selected so that a DDS will not output a spurious at a specified level or at a level higher than the specified level within an output band of an PLL in response to an output frequency from the PLL, both a conversion function setting parameter for a variable divider in the PLL and a dividing number setting parameter for a variable divider in the reference oscillator are adjusted so that the output frequency and the selected frequency setting parameter are satisfied.
摘要:
A signal transmission system has a modulation signal converter 1 that generates a modulation signal using a Manchester code with a duty ratio of 50% in accordance with transmission data; a clock generator 6 that generates a clock with the amount of delay with respect to the rising or falling edge of the modulation signal; and a data detector 5 that generates received data by sampling the modulation signal in synchronization with the clock. Since the modulation signal converter 1 generates the modulation signal by combining the Manchester code with the duty ratio of 50%, its duty ratio is always 50% independently of the transmission data, thereby preventing the DC offset of the modulation signal on the receiving side. Accordingly, it offers an advantage of achieving good communication quality with a simple circuit configuration without producing the DC offset in the modulation signal on the receiving side.
摘要:
A voltage-controlled oscillator has a tuned circuit for controlling the oscillation frequency. The tuned circuit has a variable-capacitance element whose capacitance varies in response to a control voltage and a negative capacitance circuit whose impedance frequency characteristics have opposite characteristics to those of a normal capacitance, and which is connected to the variable-capacitance element. The configuration enables increasing the variation ratio corresponding to the control voltage of the combined capacitance composed of the variable-capacitance element and negative capacitance circuit, thereby broadening the oscillation frequency band.
摘要:
A DRAM whose operation is sped up and power consumption is reduced is provided. A pair of precharge MOSFETs for supplying a precharge voltage to a pair of input/output nodes of a CMOS sense amplifier is provided; the pair of input/output nodes are connected to a complementary bit-line pair via a selection switch MOSFET; a first equalize MOSFET is provided between the complementary bit-line pair for equalizing them; a memory cell is provided between one of the complementary bit-line pair and a word line intersecting with it; gate insulators of the selection switch MOSFETs and first equalize MOSFET are formed by first film thickness; a gate insulator of the precharge MOSFET is formed by second film thickness thinner than the first film thickness; a precharge signal corresponding to a power supply voltage is supplied to the precharge MOSFET; and an equalize signal and a selection signal corresponding to a boost voltage are supplied to the first equalize MOSFET and the selection switch MOSFET, respectively.
摘要:
A dielectric material having a low dielectric loss factor for high-frequency use, which comprises a sintered product of silicon nitride chiefly composed of silicon nitride and containing at least oxygen as an impurity component or oxygen as an impurity component and a compound of an element of the Group 3a of periodic table, wherein said sintered product contains aluminum in an amount which is not larger than 2% by weight reckoned as an oxide thereof having relative densities of not smaller than 97% and has a dielectric loss factor at 10 GHz ofnot larger than 5.times.10.sup.-4. The dielectric material has excellent mechanical properties such as large strength and excellent chemical stability, features small dielectric loss factor in high-frequency regions, and is suited for use as a material for high-frequency oscillators, antennas, filters and electronic circuit boards. In particular, those dielectric materials are suited for use as window materials for introducing high frequencies in a high-frequency plasma-generating CVD apparatus, a microwave wave output unit and an oscillator.
摘要:
A sintered product of silicon nitride containing not smaller than 70 mol % of a .beta.-silicon nitride as well as an element of the Group 3a at least including Lu of periodic table and impurity oxygen, wherein when the content of the element of the Group 3a of periodic table and the content of the impurity oxygen are, respectively, expressed being reckoned as the amount of an oxide of the element of the Group 3a of periodic table (RE.sub.2 O.sub.3) and as the amount of SiO.sub.2 of impurity oxygen, their total amount is from 2 to 30 mol %, the molar ratio (SiO.sub.2 /RE.sub.2 O.sub.3) of the amount of the element of the Group 3a of periodic table reckoned as the oxide (RE.sub.2 O.sub.3) thereof to the amount of impurity oxygen reckoned as SiO.sub.2 is from 1.6 to 10, and the intergranular phase of the sintered product chiefly comprises a crystal phase consisting of the element of the Group 3a of periodic table, silicon and oxygen and a process for producing the same. The sintered product has a large strength from room temperature through up to high temperatures and maintains excellent resistance against oxidation even at high temperatures, and exhibits excellent resistance against creeping and excellent breaking toughness.
摘要翻译:包含不小于70mol%的β-氮化硅的氮化硅的烧结产品以及至少包括Lu的元素周期表和杂质氧的第3a族的元素,其中当第3a族元素的含量 的周期表和杂质氧的含量分别表示为元素周期表(RE 2 O 3)的第3a族元素的氧化物的量和杂质氧的SiO 2的量,它们的总量是 2〜30摩尔%时,作为氧化物(RE 2 O 3)的元素周期表中的元素的量与作为SiO 2计算的杂质氧的量的摩尔比(SiO 2 / RE 2 O 3)为1.6〜10 ,并且烧结体的晶间相主要包含由元素周期表第3a族元素,硅和氧组成的结晶相及其制造方法。 该烧结体从室温至高温具有很大的强度,即使在高温下也能保持优异的抗氧化性,并且具有优异的抗蠕变性和优异的断裂韧性。
摘要:
A signal transmission system has a modulation signal converter 1 that generates a modulation signal using a Manchester code with a duty ratio of 50% in accordance with transmission data; a clock generator 6 that generates a clock with the amount of delay with respect to the rising or falling edge of the modulation signal; and a data detector 5 that generates received data by sampling the modulation signal in synchronization with the clock. Since the modulation signal converter 1 generates the modulation signal by combining the Manchester code with the duty ratio of 50%, its duty ratio is always 50% independently of the transmission data, thereby preventing the DC offset of the modulation signal on the receiving side. Accordingly, it offers an advantage of achieving good communication quality with a simple circuit configuration without producing the DC offset in the modulation signal on the receiving side.
摘要:
T provide an N type thermoelectric material having figure of the merit improved to be comparable to or higher than that of P type thermoelectric material, the N type thermoelectric material of the present invention contains at least one kind of Bi and Sb and at least one kind of Te and Se as main components, and contains bromine (Br) and iodine (I) to have carrier in such a concentration that corresponds to the contents of bromine (Br) and iodine (I).
摘要:
Provided is a phase-locked loop frequency synthesizer, including: a reference oscillator; a voltage controlled oscillator; a variable frequency divider that divides the high frequency signal in frequency to output a feedback signal; a phase comparator that compares the reference signal and the feedback signal with each other to output a phase comparison signal; a loop filter that outputs a control signal of the voltage controlled oscillator based on the phase comparison signal; and a frequency/phase control circuit that generates frequency division number control data in synchronism with any one of the feedback signal and the reference signal based on setting data which is input from an external to give an output frequency and setting data which is input from the external to give a phase to the reference signal, to thereby output the frequency division number control data to the variable frequency divider.
摘要:
Provided is a phase-locked loop frequency synthesizer, including: a reference oscillator; a voltage controlled oscillator; a variable frequency divider that divides the high frequency signal in frequency to output a feedback signal; a phase comparator that compares the reference signal and the feedback signal with each other to output a phase comparison signal; a loop filter that outputs a control signal of the voltage controlled oscillator based on the phase comparison signal; and a frequency/phase control circuit that generates frequency division number control data in synchronism with any one of the feedback signal and the reference signal based on setting data which is input from an external to give an output frequency and setting data which is input from the external to give a phase to the reference signal, to thereby output the frequency division number control data to the variable frequency divider.