公开(公告)号：US07582901B2

公开(公告)日：2009-09-01

申请号：US11059651

申请日：2005-02-17

申请人： Kenichi Takeda ,  Tsuyoshi Fujiwara ,  Toshinori Imai ,  Tsuyoshi Ishikawa ,  Toshiyuki Mine ,  Makoto Miura

发明人： Kenichi Takeda ,  Tsuyoshi Fujiwara ,  Toshinori Imai ,  Tsuyoshi Ishikawa ,  Toshiyuki Mine ,  Makoto Miura

IPC分类号： H01L29/76

CPC分类号： H01L28/40 ,  H01L21/76838

摘要： An MIM capacitor using a high-permittivity dielectric film such as tantalum oxide. The MIM capacitor includes an upper electrode, a dielectric film, and a lower electrode. A second dielectric film and the dielectric film are formed between the upper electrode and the lower electrode, at the end of the MIM capacitor. The second dielectric film is formed to have an opening at the top of the lower electrode. The dielectric film abuts the lower electrode via the opening. The upper electrode is formed on the dielectric film. The upper electrode and the dielectric film are formed in such a manner as to embrace the opening entirely, and the second dielectric film and the lower electrode are formed so that the respective widths are the same as, or greater than, the widths of the upper electrode and the dielectric film.

摘要翻译： 使用诸如氧化钽的高介电常数电介质膜的MIM电容器。 MIM电容器包括上电极，电介质膜和下电极。 在MIM电容器的端部，在上电极和下电极之间形成第二电介质膜和电介质膜。 第二电介质膜形成为在下电极的顶部具有开口。 电介质膜经由开口抵接下电极。 上电极形成在电介质膜上。 上部电极和电介质膜以完全包围开口的方式形成，并且第二电介质膜和下部电极形成为使得各个宽度与上部的宽度相同或更大 电极和电介质膜。

公开(公告)号：US20050212082A1

公开(公告)日：2005-09-29

申请号：US11059651

申请日：2005-02-17

申请人： Kenichi Takeda ,  Tsuyoshi Fujiwara ,  Toshinori Imai ,  Tsuyoshi Ishikawa ,  Toshiyuki Mine ,  Makoto Miura

发明人： Kenichi Takeda ,  Tsuyoshi Fujiwara ,  Toshinori Imai ,  Tsuyoshi Ishikawa ,  Toshiyuki Mine ,  Makoto Miura

IPC分类号： H01L21/02 ,  H01L21/768 ,  H01L27/108

CPC分类号： H01L28/40 ,  H01L21/76838

摘要： An MIM capacitor using a high-permittivity dielectric film such as tantalum oxide. The MIM capacitor includes an upper electrode, a dielectric film, and a lower electrode. A second dielectric film and the dielectric film are formed between the upper electrode and the lower electrode, at the end of the MIM capacitor. The second dielectric film is formed to have an opening at the top of the lower electrode. The dielectric film abuts the lower electrode via the opening. The upper electrode is formed on the dielectric film. The upper electrode and the dielectric film are formed in such a manner as to embrace the opening entirely, and the second dielectric film and the lower electrode are formed so that the respective widths are the same as, or greater than, the widths of the upper electrode and the dielectric film.

摘要翻译： 使用诸如氧化钽的高介电常数电介质膜的MIM电容器。 MIM电容器包括上电极，电介质膜和下电极。 在MIM电容器的端部，在上电极和下电极之间形成第二电介质膜和电介质膜。 第二电介质膜形成为在下电极的顶部具有开口。 电介质膜经由开口抵接下电极。 上电极形成在电介质膜上。 上部电极和电介质膜以完全包围开口的方式形成，并且第二电介质膜和下部电极形成为使得各个宽度与上部的宽度相同或更大 电极和电介质膜。

公开(公告)号：US08294213B2

公开(公告)日：2012-10-23

申请号：US12838445

申请日：2010-07-17

申请人： Makoto Miura ,  Shinichi Saito ,  Youngkun Lee ,  Katsuya Oda

发明人： Makoto Miura ,  Shinichi Saito ,  Youngkun Lee ,  Katsuya Oda

IPC分类号： H01L21/00 ,  H01L21/331 ,  H01L27/12

CPC分类号： H01L31/03921 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02505 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02647 ,  H01L31/028 ,  H01L31/103 ,  H01L31/1808 ,  Y02E10/547

摘要： A semiconductor photodiode device includes a semiconductor substrate, a first buffer layer containing a material different from that of the semiconductor substrate in a portion thereof, a first semiconductor layer formed above the buffer layer and having a lattice constant different from that of the semiconductor substrate, a second buffer layer formed above the first semiconductor layer and containing an element identical with that of the first semiconductor layer in a portion thereof, and a second semiconductor layer formed above the buffer layer in which a portion of the first semiconductor layer is formed of a plurality of island shape portions each surrounded with an insulating film, and the second buffer layer allows adjacent islands of the first semiconductor layer to coalesce with each other and is in contact with the insulating film.

摘要翻译： 半导体光电二极管装置包括半导体衬底，第一缓冲层，其部分含有不同于半导体衬底的材料;第一半导体层，形成在缓冲层上方，具有不同于半导体衬底的晶格常数; 第二缓冲层，形成在第一半导体层的上方，并且在其一部分中含有与第一半导体层相同的元件;以及第二半导体层，形成在缓冲层的上方，第一半导体层的一部分由 多个岛状部分，各自被绝缘膜包围，第二缓冲层允许第一半导体层的相邻岛状物彼此聚结并与绝缘膜接触。

公开(公告)号：US07214973B2

公开(公告)日：2007-05-08

申请号：US11070229

申请日：2005-03-03

申请人： Makoto Miura ,  Katsuyoshi Washio ,  Hiromi Shimamoto

发明人： Makoto Miura ,  Katsuyoshi Washio ,  Hiromi Shimamoto

IPC分类号： H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

CPC分类号： H01L29/7378 ,  H01L29/0821 ,  H01L29/66242

摘要： A bipolar type semiconductor device capable of attaining high current gain and high cut-off frequency and performing a satisfactory transistor operation also in a high current region while maintaining a high breakdown voltage performance, as well as a method of manufacturing the semiconductor device, are provided. In a collector comprising a first semiconductor layer and a second semiconductor layer narrower in band gap than the first semiconductor layer, an impurity is doped so as to have a peak of impurity concentration within the second collector layer and so that the value of the peak is higher than the impurity concentration at any position within the first collector layer. It is preferable to adjust the concentration of the doped impurity in such a manner that a collector-base depletion layer extends up to the first collector layer.

摘要翻译： 提供一种能够在保持高的击穿电压性能的同时在高电流区域中获得高电流增益和高截止频率并执行令人满意的晶体管操作的双极型半导体器件，以及制造半导体器件的方法 。 在包含比第一半导体层窄的带隙的第一半导体层和第二半导体层的集电体中，掺杂杂质以使第二集电极层内的杂质浓度的峰值为峰值， 高于第一收集层内任何位置的杂质浓度。 优选以使得集电极 - 基极耗尽层向上延伸到第一集电极层的方式调节掺杂杂质的浓度。

公开(公告)号：US20060169987A1

公开(公告)日：2006-08-03

申请号：US11072279

申请日：2005-03-07

申请人： Makoto Miura ,  Katsuya Oda ,  Katsuyoshi Washio

发明人： Makoto Miura ,  Katsuya Oda ,  Katsuyoshi Washio

IPC分类号： H01L33/00 ,  H01S5/20

CPC分类号： H01L21/0262 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/02447 ,  H01L21/0245 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/02529 ,  H01L33/12

摘要： A high quality silicon carbide (SiC) layer being substantially lower in threading dislocation density than a prior layer is formed on silicon (Si) substrate. A semiconductor device is fabricated in such a way that a semiconductor buffer layer containing Si in part and being higher in defect density than a Si substrate is formed on the Si substrate on the upper portion of which are formed a plurality of pairs of facets being mirror-symmetrical to the surface orientation of a semiconductor substrate, further on the top of the layer a SiC layer is sequentially formed.

摘要翻译： 在硅（Si）衬底上形成了高于先有层的穿透位错密度较低的高质量碳化硅（SiC）层。 以这样的方式制造半导体器件，即在Si衬底上形成有部分地Si密度高于Si衬底的半导体缓冲层，其半导体缓冲层的缺陷密度高于Si衬底，其上部形成有成对的多对面 与半导体衬底的表面取向对称，此外在层的顶部依次形成SiC层。

公开(公告)号：US20060103618A1

公开(公告)日：2006-05-18

申请号：US11251890

申请日：2005-10-18

申请人： Makoto Miura

发明人： Makoto Miura

IPC分类号： G09G3/36

CPC分类号： G09G3/3688 ,  G09G3/3614 ,  G09G2310/0251 ,  G09G2310/0289 ,  G09G2310/0297 ,  G09G2330/021 ,  G09G2330/023

摘要： To provide a driver circuit that enables reduction in the number of elements formed through a high-voltage process and in chip size. An embodiment of the present invention relates to a driver circuit for inversion-driving a liquid crystal display panel, including: a positive-polarity line transmitting a positive display signal relative to a common electrode signal; a negative-polarity line transmitting a negative display signal relative to the common electrode signal; a dot inversion switch circuit switching the positive-polarity line and the negative-polarity line from each other to be connected with a source line; a charge recovery circuit connected with the positive-polarity line through a positive charge recovery switch and connected with the negative-polarity line through a negative charge recovery switch; and a common short circuit connecting the positive-polarity line and the negative-polarity line with a common electrode.

摘要翻译： 提供能够减少通过高压处理和芯片尺寸形成的元件的数量的驱动电路。 本发明的实施例涉及一种用于逆向驱动液晶显示面板的驱动电路，包括：正极性线，其相对于公共电极信号发送正显示信号; 相对于公共电极信号发送负显示信号的负极性线; 点反转开关电路，将正极性线和负极性线彼此切换为与源极线连接; 通过正电荷恢复开关与正极性线连接的充电恢复电路，并通过负电荷恢复开关与负极性线连接; 以及将正极性线和负极性线与公共电极连接的公共短路。

公开(公告)号：US07800601B2

公开(公告)日：2010-09-21

申请号：US11819293

申请日：2007-06-26

申请人： Makoto Miura

发明人： Makoto Miura

IPC分类号： G09G5/00

CPC分类号： G09G3/3688 ,  G09G3/3614 ,  G09G3/3655 ,  G09G2310/027 ,  G09G2310/0297 ,  G09G2310/08 ,  G09G2330/021 ,  G09G2330/023 ,  G09G2340/0428

摘要： Disclosed is a display controlling apparatus including latch circuits for holding color data of a current line and a previous line, a latch circuit for holding a polarity signal of the previous line, and a recovery control circuit. The recovery control circuit controls a recovery switch from color data of the previous and current lines, a polarity signal and a recovery clock. For both driving method employing frame-based common inverting and the driving method employing line-based common inverting, the display/controlling apparatus recovers electric charge efficiently to provide for low power dissipation.

摘要翻译： 公开了一种显示控制装置，包括用于保持当前行和前一行的彩色数据的锁存电路，用于保持前一行的极性信号的锁存电路和恢复控制电路。 恢复控制电路根据前一行和当前行的颜色数据，极性信号和恢复时钟控制恢复开关。 对于采用基于帧的公共反相的驱动方法和采用基于线的公共反相的驱动方法，显示/控制装置有效地恢复电荷以提供低功耗。

公开(公告)号：US07095043B2

公开(公告)日：2006-08-22

申请号：US10790190

申请日：2004-03-02

申请人： Katsuya Oda ,  Nobuyuki Sugii ,  Makoto Miura ,  Isao Suzumura ,  Katsuyoshi Washio

发明人： Katsuya Oda ,  Nobuyuki Sugii ,  Makoto Miura ,  Isao Suzumura ,  Katsuyoshi Washio

IPC分类号： H01L29/06 ,  H01L31/0328

CPC分类号： H01L29/66068 ,  H01L21/823807 ,  H01L27/0922 ,  H01L29/1054 ,  H01L29/1608

摘要： An (SiGe)C layer having a stoichiometric ratio of about 1:1 is locally formed on an Si layer, a large forbidden band width semiconductor device is prepared inside the layered structure thereof and an Si semiconductor integrated circuit is formed in the regions not formed with the layered structure, whereby high frequency high power operation of the device is enabled by the large forbidden band width semiconductor device and high performance is attained by hybridization of the Si integrated circuit.

摘要翻译： 在Si层上局部地形成化学计量比为约1:1的An（SiGe）C层，在其层叠结构内制备大的禁带宽半导体器件，并且在未形成的区域中形成Si半导体集成电路 具有分层结构，由此通过大的禁带宽半导体器件能够实现器件的高频高功率操作，并且通过Si集成电路的杂交获得高性能。

公开(公告)号：US20060043418A1

公开(公告)日：2006-03-02

申请号：US11070229

申请日：2005-03-03

申请人： Makoto Miura ,  Katsuyoshi Washio ,  Hiromi Shimamoto

发明人： Makoto Miura ,  Katsuyoshi Washio ,  Hiromi Shimamoto

IPC分类号： H01L31/109

CPC分类号： H01L29/7378 ,  H01L29/0821 ,  H01L29/66242

摘要： A bipolar type semiconductor device capable of attaining high current gain and high cut-off frequency and performing a satisfactory transistor operation also in a high current region while maintaining a high breakdown voltage performance, as well as a method of manufacturing the semiconductor device, are provided. In a collector comprising a first semiconductor layer and a second semiconductor layer narrower in band gap than the first semiconductor layer, an impurity is doped so as to have a peak of impurity concentration within the second collector layer and so that the value of the peak is higher than the impurity concentration at any position within the first collector layer. It is preferable to adjust the concentration of the doped impurity in such a manner that a collector-base depletion layer extends up to the first collector layer.

摘要翻译： 提供一种能够在保持高的击穿电压性能的同时在高电流区域中获得高电流增益和高截止频率并执行令人满意的晶体管操作的双极型半导体器件，以及制造半导体器件的方法 。 在包含比第一半导体层窄的带隙的第一半导体层和第二半导体层的集电体中，掺杂杂质以使第二集电极层内的杂质浓度的峰值为峰值， 高于第一收集层内任何位置的杂质浓度。 优选以使得集电极 - 基极耗尽层向上延伸到第一集电极层的方式调节掺杂杂质的浓度。

公开(公告)号：US06943594B2

公开(公告)日：2005-09-13

申请号：US10824596

申请日：2004-04-15

申请人： Makoto Miura

发明人： Makoto Miura

IPC分类号： G02F1/133 ,  G09G3/20 ,  G09G3/36 ,  H03F3/30 ,  H03F3/45 ,  H03B1/00

CPC分类号： G09G3/3688 ,  G09G2330/021 ,  H03F3/3023 ,  H03F3/45237 ,  H03F2203/30021 ,  H03F2203/45726

摘要： In a driver, a voltage-follower-type operational amplifier receives current input data to generate an output signal. A transient state detecting circuit detects a transient state in the current input data to generate a first pulse signal when the current input data is increased and generate a second pulse signal when the current input data is decreased. A switch circuit substantially increases corresponding load currents flowing through the voltage-follower-type operational amplifier in accordance with the first and second pulse signals.

摘要翻译： 在驱动器中，电压跟随器型运算放大器接收当前输入数据以产生输出信号。 瞬态状态检测电路在当前输入数据增加时检测当前输入数据中的过渡状态，以产生第一脉冲信号，并且当当前输入数据减小时产生第二脉冲信号。 开关电路根据第一和第二脉冲信号基本上增加流过电压跟随器型运算放大器的对应负载电流。